mc8051_top_srr.htm

8051VHDL原代码

Duplicate Module/Entity Name OBUFTDS_LVDSEXT_25, appending...
Duplicate Module/Entity Name OBUFTDS_LVDSEXT_33, appending...
Duplicate Module/Entity Name OBUFTDS_LVPECL_25, appending...
Duplicate Module/Entity Name OBUFTDS_LVPECL_33, appending...
Duplicate Module/Entity Name OBUFTDS_ULVDS_25, appending...
Duplicate Module/Entity Name ODDR, appending...
Duplicate Module/Entity Name ODDR2, appending...
Duplicate Module/Entity Name OFDDRCPE, appending...
Duplicate Module/Entity Name OFDDRRSE, appending...
Duplicate Module/Entity Name OFDDRTCPE, appending...
Duplicate Module/Entity Name OFDDRTRSE, appending...
Duplicate Module/Entity Name OR2, appending...
Duplicate Module/Entity Name OR2B1, appending...
Duplicate Module/Entity Name OR2B2, appending...
Duplicate Module/Entity Name OR3, appending...
Duplicate Module/Entity Name OR3B1, appending...
Duplicate Module/Entity Name OR3B2, appending...
Duplicate Module/Entity Name OR3B3, appending...
Duplicate Module/Entity Name OR4, appending...
Duplicate Module/Entity Name OR4B1, appending...
Duplicate Module/Entity Name OR4B2, appending...
Duplicate Module/Entity Name OR4B3, appending...
Duplicate Module/Entity Name OR4B4, appending...
Duplicate Module/Entity Name OR5, appending...
Duplicate Module/Entity Name OR5B1, appending...
Duplicate Module/Entity Name OR5B2, appending...
Duplicate Module/Entity Name OR5B3, appending...
Duplicate Module/Entity Name OR5B4, appending...
Duplicate Module/Entity Name OR5B5, appending...
Duplicate Module/Entity Name ORCY, appending...
Duplicate Module/Entity Name OSERDES, appending...
Duplicate Module/Entity Name PMCD, appending...
Duplicate Module/Entity Name PPC405, appending...
Duplicate Module/Entity Name PPC405_ADV, appending...
Duplicate Module/Entity Name PULLDOWN, appending...
Duplicate Module/Entity Name PULLUP, appending...
Duplicate Module/Entity Name RAM128X1S, appending...
Duplicate Module/Entity Name RAM128X1S_1, appending...
Duplicate Module/Entity Name RAM16X1D, appending...
Duplicate Module/Entity Name RAM16X1D_1, appending...
Duplicate Module/Entity Name RAM16X1S, appending...
Duplicate Module/Entity Name RAM16X1S_1, appending...
Duplicate Module/Entity Name RAM16X2S, appending...
Duplicate Module/Entity Name RAM16X4S, appending...
Duplicate Module/Entity Name RAM16X8S, appending...
Duplicate Module/Entity Name RAM32X1D, appending...
Duplicate Module/Entity Name RAM32X1D_1, appending...
Duplicate Module/Entity Name RAM32X1S, appending...
Duplicate Module/Entity Name RAM32X1S_1, appending...
Duplicate Module/Entity Name RAM32X2S, appending...
Duplicate Module/Entity Name RAM32X4S, appending...
Duplicate Module/Entity Name RAM32X8S, appending...
Duplicate Module/Entity Name RAM64X1D, appending...
Duplicate Module/Entity Name RAM64X1D_1, appending...
Duplicate Module/Entity Name RAM64X1S, appending...
Duplicate Module/Entity Name RAM64X1S_1, appending...
Duplicate Module/Entity Name RAM64X2S, appending...
Duplicate Module/Entity Name RAMB16, appending...
Duplicate Module/Entity Name RAMB16_S1, appending...
Duplicate Module/Entity Name RAMB16_S18, appending...
Duplicate Module/Entity Name RAMB16_S18_S18, appending...
Duplicate Module/Entity Name RAMB16_S18_S36, appending...
Duplicate Module/Entity Name RAMB16_S1_S1, appending...
Duplicate Module/Entity Name RAMB16_S1_S18, appending...
Duplicate Module/Entity Name RAMB16_S1_S2, appending...
Duplicate Module/Entity Name RAMB16_S1_S36, appending...
Duplicate Module/Entity Name RAMB16_S1_S4, appending...
Duplicate Module/Entity Name RAMB16_S1_S9, appending...
Duplicate Module/Entity Name RAMB16_S2, appending...
Duplicate Module/Entity Name RAMB16_S2_S18, appending...
Duplicate Module/Entity Name RAMB16_S2_S2, appending...
Duplicate Module/Entity Name RAMB16_S2_S36, appending...
Duplicate Module/Entity Name RAMB16_S2_S4, appending...
Duplicate Module/Entity Name RAMB16_S2_S9, appending...
Duplicate Module/Entity Name RAMB16_S36, appending...
Duplicate Module/Entity Name RAMB16_S36_S36, appending...
Duplicate Module/Entity Name RAMB16_S4, appending...
Duplicate Module/Entity Name RAMB16_S4_S18, appending...
Duplicate Module/Entity Name RAMB16_S4_S36, appending...
Duplicate Module/Entity Name RAMB16_S4_S4, appending...
Duplicate Module/Entity Name RAMB16_S4_S9, appending...
Duplicate Module/Entity Name RAMB16_S9, appending...
Duplicate Module/Entity Name RAMB16_S9_S18, appending...
Duplicate Module/Entity Name RAMB16_S9_S36, appending...
Duplicate Module/Entity Name RAMB16_S9_S9, appending...
Duplicate Module/Entity Name RAMB32_S64_ECC, appending...
Duplicate Module/Entity Name RAMB4_S1, appending...
Duplicate Module/Entity Name RAMB4_S16, appending...
Duplicate Module/Entity Name RAMB4_S16_S16, appending...
Duplicate Module/Entity Name RAMB4_S1_S1, appending...
Duplicate Module/Entity Name RAMB4_S1_S16, appending...
Duplicate Module/Entity Name RAMB4_S1_S2, appending...
Duplicate Module/Entity Name RAMB4_S1_S4, appending...
Duplicate Module/Entity Name RAMB4_S1_S8, appending...
Duplicate Module/Entity Name RAMB4_S2, appending...
Duplicate Module/Entity Name RAMB4_S2_S16, appending...
Duplicate Module/Entity Name RAMB4_S2_S2, appending...
Duplicate Module/Entity Name RAMB4_S2_S4, appending...
Duplicate Module/Entity Name RAMB4_S2_S8, appending...
Duplicate Module/Entity Name RAMB4_S4, appending...
Duplicate Module/Entity Name RAMB4_S4_S16, appending...
Duplicate Module/Entity Name RAMB4_S4_S4, appending...
Duplicate Module/Entity Name RAMB4_S4_S8, appending...
Duplicate Module/Entity Name RAMB4_S8, appending...
Duplicate Module/Entity Name RAMB4_S8_S16, appending...
Duplicate Module/Entity Name RAMB4_S8_S8, appending...
Duplicate Module/Entity Name ROM128X1, appending...
Duplicate Module/Entity Name ROM16X1, appending...
Duplicate Module/Entity Name ROM256X1, appending...
Duplicate Module/Entity Name ROM32X1, appending...
Duplicate Module/Entity Name ROM64X1, appending...
Duplicate Module/Entity Name SRL16, appending...
Duplicate Module/Entity Name SRL16_1, appending...
Duplicate Module/Entity Name SRL16E, appending...
Duplicate Module/Entity Name SRL16E_1, appending...
Duplicate Module/Entity Name SRLC16, appending...
Duplicate Module/Entity Name SRLC16_1, appending...
Duplicate Module/Entity Name SRLC16E, appending...
Duplicate Module/Entity Name SRLC16E_1, appending...
Duplicate Module/Entity Name STARTUP_FPGACORE, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN2, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN3, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN3E, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX4, appending...
Duplicate Module/Entity Name TBLOCK, appending...
Duplicate Module/Entity Name TIMEGRP, appending...
Duplicate Module/Entity Name TIMESPEC, appending...
Duplicate Module/Entity Name USR_ACCESS_VIRTEX4, appending...
Duplicate Module/Entity Name VCC, appending...
Duplicate Module/Entity Name XNOR2, appending...
Duplicate Module/Entity Name XNOR3, appending...
Duplicate Module/Entity Name XNOR4, appending...
Duplicate Module/Entity Name XNOR5, appending...
Duplicate Module/Entity Name XOR2, appending...
Duplicate Module/Entity Name XOR3, appending...
Duplicate Module/Entity Name XOR4, appending...
Duplicate Module/Entity Name XOR5, appending...
Duplicate Module/Entity Name XORCY, appending...
Duplicate Module/Entity Name XORCY_D, appending...
Duplicate Module/Entity Name XORCY_L, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_CLK, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_GSR, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_GTS, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_GHIGH, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_GWE, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX2_ALL, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX_CLK, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX_GSR, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX_GTS, appending...
Duplicate Module/Entity Name STARTUP_VIRTEX_ALL, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN2_CLK, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN2_GSR, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN2_GTS, appending...
Duplicate Module/Entity Name STARTUP_SPARTAN2_ALL, appending...
VHDL syntax check successful!
Options changed - recompiling
@N: : <a href="e:\vhdl\f8051\mc8051_top.vhd:9:7:9:17:@N::@XP_MSG">mc8051_top.vhd(9)</a><!@TM:1180669350> | Synthesizing work.mc8051_top.struc 
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\mc8051_top.vhd:55:9:55:23:@W::@XP_MSG">mc8051_top.vhd(55)</a><!@TM:1180669350> | Signal s_ramx_data_in is undriven </font>
@N: : <a href="e:\vhdl\f8051\mc8051_clockdiv.vhd:11:7:11:22:@N::@XP_MSG">mc8051_clockdiv.vhd(11)</a><!@TM:1180669350> | Synthesizing work.mc8051_clockdiv.behavioral 
Post processing for work.mc8051_clockdiv.behavioral
@N: : <a href="e:\vhdl\f8051\mc8051_rom.vhd:43:7:43:17:@N::@XP_MSG">mc8051_rom.vhd(43)</a><!@TM:1180669350> | Synthesizing work.mc8051_rom.mc8051_rom_a 
<font color=#A52A2A>@W:<a href="@W:CD286:@XP_HELP">CD286</a> : <a href="e:\vhdl\f8051\mc8051_rom.vhd:43:7:43:17:@W:CD286:@XP_MSG">mc8051_rom.vhd(43)</a><!@TM:1180669350> | Creating black box for empty architecture mc8051_rom </font>
Post processing for work.mc8051_rom.mc8051_rom_a
@N: : <a href="e:\vhdl\f8051\mc8051_ram.vhd:43:7:43:17:@N::@XP_MSG">mc8051_ram.vhd(43)</a><!@TM:1180669350> | Synthesizing work.mc8051_ram.mc8051_ram_a 
<font color=#A52A2A>@W:<a href="@W:CD286:@XP_HELP">CD286</a> : <a href="e:\vhdl\f8051\mc8051_ram.vhd:43:7:43:17:@W:CD286:@XP_MSG">mc8051_ram.vhd(43)</a><!@TM:1180669350> | Creating black box for empty architecture mc8051_ram </font>
Post processing for work.mc8051_ram.mc8051_ram_a
@N: : <a href="e:\vhdl\f8051\mc8051_core.vhd:9:7:9:18:@N::@XP_MSG">mc8051_core.vhd(9)</a><!@TM:1180669350> | Synthesizing work.mc8051_core.struc 
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\mc8051_core.vhd:68:9:68:16:@W::@XP_MSG">mc8051_core.vhd(68)</a><!@TM:1180669350> | Signal s_reset is undriven </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\mc8051_core.vhd:69:9:69:14:@W::@XP_MSG">mc8051_core.vhd(69)</a><!@TM:1180669350> | Signal s_clk is undriven </font>
@N: : <a href="e:\vhdl\f8051\mc8051_tmrctr.vhd:13:7:13:20:@N::@XP_MSG">mc8051_tmrctr.vhd(13)</a><!@TM:1180669350> | Synthesizing work.mc8051_tmrctr.rtl 
Post processing for work.mc8051_tmrctr.rtl
@N: : <a href="e:\vhdl\f8051\mc8051_siu.vhd:8:7:8:17:@N::@XP_MSG">mc8051_siu.vhd(8)</a><!@TM:1180669350> | Synthesizing work.mc8051_siu.rtl 
Post processing for work.mc8051_siu.rtl
<font color=#A52A2A>@W:<a href="@W:CL170:@XP_HELP">CL170</a> : <a href="e:\vhdl\f8051\mc8051_siu.vhd:370:6:370:8:@W:CL170:@XP_MSG">mc8051_siu.vhd(370)</a><!@TM:1180669350> | Pruning bit <0> of p_transmit.s_tran_sh_26(10 downto 0) - not in use ... </font>
@N: : <a href="e:\vhdl\f8051\mc8051_alu.vhd:29:7:29:17:@N::@XP_MSG">mc8051_alu.vhd(29)</a><!@TM:1180669350> | Synthesizing work.mc8051_alu.struc 
@N: : <a href="e:\vhdl\f8051\dcml_adjust.vhd:14:7:14:18:@N::@XP_MSG">dcml_adjust.vhd(14)</a><!@TM:1180669350> | Synthesizing work.dcml_adjust.rtl 
Post processing for work.dcml_adjust.rtl
@N: : <a href="e:\vhdl\f8051\comb_divider.vhd:14:7:14:19:@N::@XP_MSG">comb_divider.vhd(14)</a><!@TM:1180669350> | Synthesizing work.comb_divider.rtl 
Post processing for work.comb_divider.rtl
@N: : <a href="e:\vhdl\f8051\comb_mltplr.vhd:14:7:14:18:@N::@XP_MSG">comb_mltplr.vhd(14)</a><!@TM:1180669350> | Synthesizing work.comb_mltplr.rtl 
Post processing for work.comb_mltplr.rtl
@N: : <a href="e:\vhdl\f8051\addsub_core.vhd:18:7:18:18:@N::@XP_MSG">addsub_core.vhd(18)</a><!@TM:1180669350> | Synthesizing work.addsub_core.struc 
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\addsub_core.vhd:37:9:37:13:@W::@XP_MSG">addsub_core.vhd(37)</a><!@TM:1180669350> | Signal s_cy_3 is undriven </font>
@N: : <a href="e:\vhdl\f8051\addsub_ovcy.vhd:14:7:14:18:@N::@XP_MSG">addsub_ovcy.vhd(14)</a><!@TM:1180669350> | Synthesizing work.addsub_ovcy.rtl 
Post processing for work.addsub_ovcy.rtl
@N: : <a href="e:\vhdl\f8051\addsub_cy.vhd:8:7:8:16:@N::@XP_MSG">addsub_cy.vhd(8)</a><!@TM:1180669350> | Synthesizing work.addsub_cy.rtl 
Post processing for work.addsub_cy.rtl
Post processing for work.addsub_core.struc
<font color=#A52A2A>@W:<a href="@W:CL162:@XP_HELP">CL162</a> : <a href="e:\vhdl\f8051\addsub_core.vhd:37:9:37:13:@W:CL162:@XP_MSG">addsub_core.vhd(37)</a><!@TM:1180669350> | s_cy_3 is not assigned a value (floating) </font>
@N: : <a href="e:\vhdl\f8051\alucore.vhd:15:7:15:14:@N::@XP_MSG">alucore.vhd(15)</a><!@TM:1180669350> | Synthesizing work.alucore.rtl 
Post processing for work.alucore.rtl
@N: : <a href="e:\vhdl\f8051\alumux.vhd:16:7:16:13:@N::@XP_MSG">alumux.vhd(16)</a><!@TM:1180669350> | Synthesizing work.alumux.rtl 
Post processing for work.alumux.rtl
Post processing for work.mc8051_alu.struc
@N: : <a href="e:\vhdl\f8051\mc8051_control.vhd:10:7:10:21:@N::@XP_MSG">mc8051_control.vhd(10)</a><!@TM:1180669350> | Synthesizing work.mc8051_control.struc 
@N:<a href="@N:CD231:@XP_HELP">CD231</a> : <a href="e:\vhdl\f8051\mc8051_p.vhd:195:15:195:17:@N:CD231:@XP_MSG">mc8051_p.vhd(195)</a><!@TM:1180669350> | Using onehot encoding for type t_state (startup="10000")
@N: : <a href="e:\vhdl\f8051\control_mem.vhd:9:7:9:18:@N::@XP_MSG">control_mem.vhd(9)</a><!@TM:1180669350> | Synthesizing work.control_mem.rtl 
@N:<a href="@N:CD231:@XP_HELP">CD231</a> : <a href="e:\vhdl\f8051\mc8051_p.vhd:195:15:195:17:@N:CD231:@XP_MSG">mc8051_p.vhd(195)</a><!@TM:1180669350> | Using onehot encoding for type t_state (startup="10000")
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_mem.vhd:735:6:735:20:@W::@XP_MSG">control_mem.vhd(735)</a><!@TM:1180669350> | OTHERS clause is not synthesized </font>
Post processing for work.control_mem.rtl
@N:<a href="@N:CL134:@XP_HELP">CL134</a> : <a href="e:\vhdl\f8051\control_mem.vhd:936:4:936:6:@N:CL134:@XP_MSG">control_mem.vhd(936)</a><!@TM:1180669350> | Found RAM s_r0, depth=8, width=8
@N: : <a href="e:\vhdl\f8051\control_fsm.vhd:10:7:10:18:@N::@XP_MSG">control_fsm.vhd(10)</a><!@TM:1180669350> | Synthesizing work.control_fsm.rtl 
@N:<a href="@N:CD231:@XP_HELP">CD231</a> : <a href="e:\vhdl\f8051\mc8051_p.vhd:195:15:195:17:@N:CD231:@XP_MSG">mc8051_p.vhd(195)</a><!@TM:1180669350> | Using onehot encoding for type t_state (startup="10000")
@N:<a href="@N:CD232:@XP_HELP">CD232</a> : <a href="e:\vhdl\f8051\mc8051_p.vhd:201:24:201:26:@N:CD232:@XP_MSG">mc8051_p.vhd(201)</a><!@TM:1180669350> | Using gray code encoding for type t_instr_category
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:2146:10:2146:24:@W::@XP_MSG">control_fsm.vhd(2146)</a><!@TM:1180669350> | OTHERS clause is not synthesized </font>
Post processing for work.control_fsm.rtl
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <6> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <5> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <4> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <3> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <2> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <1> of psw(7 downto 0) is unused </font>
<font color=#A52A2A>@W: : <a href="e:\vhdl\f8051\control_fsm.vhd:29:8:29:11:@W::@XP_MSG">control_fsm.vhd(29)</a><!@TM:1180669350> | Input port bit <0> of psw(7 downto