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📄 prev_cmp_liid.tan.qmsg

📁 利用fpga实现vga解码
💻 QMSG
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\] register sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig 144.43 MHz 6.924 ns Internal " "Info: Clock \"clk\" has Internal fmax of 144.43 MHz between source register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\]\" and destination register \"sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig\" (period= 6.924 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.660 ns + Longest register register " "Info: + Longest register to register delay is 6.660 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\] 1 REG LCFF_X32_Y10_N15 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X32_Y10_N15; Fanout = 4; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.126 ns) + CELL(0.651 ns) 1.777 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|Equal1~83 2 COMB LCCOMB_X31_Y10_N30 1 " "Info: 2: + IC(1.126 ns) + CELL(0.651 ns) = 1.777 ns; Loc. = LCCOMB_X31_Y10_N30; Fanout = 1; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|Equal1~83'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.777 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/80/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.067 ns) + CELL(0.614 ns) 3.458 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|Equal1~87 3 COMB LCCOMB_X30_Y10_N16 21 " "Info: 3: + IC(1.067 ns) + CELL(0.614 ns) = 3.458 ns; Loc. = LCCOMB_X30_Y10_N16; Fanout = 21; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|Equal1~87'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.681 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/80/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.141 ns) + CELL(0.319 ns) 4.918 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|segment_shift_var~19 4 COMB LCCOMB_X32_Y10_N8 2 " "Info: 4: + IC(1.141 ns) + CELL(0.319 ns) = 4.918 ns; Loc. = LCCOMB_X32_Y10_N8; Fanout = 2; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|segment_shift_var~19'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.460 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.010 ns) + CELL(0.624 ns) 6.552 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig~28 5 COMB LCCOMB_X30_Y10_N10 1 " "Info: 5: + IC(1.010 ns) + CELL(0.624 ns) = 6.552 ns; Loc. = LCCOMB_X30_Y10_N10; Fanout = 1; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig~28'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.634 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 6.660 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig 6 REG LCFF_X30_Y10_N11 2 " "Info: 6: + IC(0.000 ns) + CELL(0.108 ns) = 6.660 ns; Loc. = LCFF_X30_Y10_N11; Fanout = 2; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.316 ns ( 34.77 % ) " "Info: Total cell delay = 2.316 ns ( 34.77 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.344 ns ( 65.23 % ) " "Info: Total interconnect delay = 4.344 ns ( 65.23 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.660 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.660 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig {} } { 0.000ns 1.126ns 1.067ns 1.141ns 1.010ns 0.000ns } { 0.000ns 0.651ns 0.614ns 0.319ns 0.624ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.824 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.824 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.279 ns clk~clkctrl 2 COMB CLKCTRL_G2 425 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.279 ns; Loc. = CLKCTRL_G2; Fanout = 425; COMB Node = 'clk~clkctrl'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.879 ns) + CELL(0.666 ns) 2.824 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig 3 REG LCFF_X30_Y10_N11 2 " "Info: 3: + IC(0.879 ns) + CELL(0.666 ns) = 2.824 ns; Loc. = LCFF_X30_Y10_N11; Fanout = 2; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|is_buffer_wrapped_once_sig'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.545 ns" { clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.806 ns ( 63.95 % ) " "Info: Total cell delay = 1.806 ns ( 63.95 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.018 ns ( 36.05 % ) " "Info: Total interconnect delay = 1.018 ns ( 36.05 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.824 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.824 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.140 ns) 1.140 ns clk 1 CLK PIN_23 2 " "Info: 1: + IC(0.000 ns) + CELL(1.140 ns) = 1.140 ns; Loc. = PIN_23; Fanout = 2; CLK Node = 'clk'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.279 ns clk~clkctrl 2 COMB CLKCTRL_G2 425 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.279 ns; Loc. = CLKCTRL_G2; Fanout = 425; COMB Node = 'clk~clkctrl'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.879 ns) + CELL(0.666 ns) 2.824 ns sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\] 3 REG LCFF_X32_Y10_N15 4 " "Info: 3: + IC(0.879 ns) + CELL(0.666 ns) = 2.824 ns; Loc. = LCFF_X32_Y10_N15; Fanout = 4; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_signaltap_impl:sld_signaltap_body\|sld_buffer_manager:sld_buffer_manager_inst\|counter\[1\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.545 ns" { clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] } "NODE_NAME" } } { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.806 ns ( 63.95 % ) " "Info: Total cell delay = 1.806 ns ( 63.95 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.018 ns ( 36.05 % ) " "Info: Total interconnect delay = 1.018 ns ( 36.05 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" "" { Text "c:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd" 113 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.660 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.660 ns" { sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~83 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~87 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~19 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~28 {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig {} } { 0.000ns 1.126ns 1.067ns 1.141ns 1.010ns 0.000ns } { 0.000ns 0.651ns 0.614ns 0.319ns 0.624ns 0.108ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.824 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.824 ns" { clk {} clk~combout {} clk~clkctrl {} sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1] {} } { 0.000ns 0.000ns 0.139ns 0.879ns } { 0.000ns 1.140ns 0.000ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "keys\[0\] register addr_b_from_key\[0\] register addr_b_from_key\[31\] 151.68 MHz 6.593 ns Internal " "Info: Clock \"keys\[0\]\" has Internal fmax of 151.68 MHz between source register \"addr_b_from_key\[0\]\" and destination register \"addr_b_from_key\[31\]\" (period= 6.593 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.329 ns + Longest register register " "Info: + Longest register to register delay is 6.329 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns addr_b_from_key\[0\] 1 REG LCFF_X29_Y2_N25 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y2_N25; Fanout = 6; REG Node = 'addr_b_from_key\[0\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { addr_b_from_key[0] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.756 ns) + CELL(0.596 ns) 1.352 ns Add0~1649 2 COMB LCCOMB_X30_Y2_N0 2 " "Info: 2: + IC(0.756 ns) + CELL(0.596 ns) = 1.352 ns; Loc. = LCCOMB_X30_Y2_N0; Fanout = 2; COMB Node = 'Add0~1649'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.352 ns" { addr_b_from_key[0] Add0~1649 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.438 ns Add0~1652 3 COMB LCCOMB_X30_Y2_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 1.438 ns; Loc. = LCCOMB_X30_Y2_N2; Fanout = 2; COMB Node = 'Add0~1652'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1649 Add0~1652 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.524 ns Add0~1655 4 COMB LCCOMB_X30_Y2_N4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 1.524 ns; Loc. = LCCOMB_X30_Y2_N4; Fanout = 2; COMB Node = 'Add0~1655'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1652 Add0~1655 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.610 ns Add0~1658 5 COMB LCCOMB_X30_Y2_N6 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 1.610 ns; Loc. = LCCOMB_X30_Y2_N6; Fanout = 2; COMB Node = 'Add0~1658'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1655 Add0~1658 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.696 ns Add0~1661 6 COMB LCCOMB_X30_Y2_N8 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 1.696 ns; Loc. = LCCOMB_X30_Y2_N8; Fanout = 2; COMB Node = 'Add0~1661'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1658 Add0~1661 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.782 ns Add0~1664 7 COMB LCCOMB_X30_Y2_N10 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 1.782 ns; Loc. = LCCOMB_X30_Y2_N10; Fanout = 2; COMB Node = 'Add0~1664'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1661 Add0~1664 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.868 ns Add0~1667 8 COMB LCCOMB_X30_Y2_N12 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 1.868 ns; Loc. = LCCOMB_X30_Y2_N12; Fanout = 2; COMB Node = 'Add0~1667'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1664 Add0~1667 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 2.058 ns Add0~1670 9 COMB LCCOMB_X30_Y2_N14 2 " "Info: 9: + IC(0.000 ns) + CELL(0.190 ns) = 2.058 ns; Loc. = LCCOMB_X30_Y2_N14; Fanout = 2; COMB Node = 'Add0~1670'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { Add0~1667 Add0~1670 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.144 ns Add0~1673 10 COMB LCCOMB_X30_Y2_N16 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 2.144 ns; Loc. = LCCOMB_X30_Y2_N16; Fanout = 2; COMB Node = 'Add0~1673'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1670 Add0~1673 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.230 ns Add0~1676 11 COMB LCCOMB_X30_Y2_N18 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 2.230 ns; Loc. = LCCOMB_X30_Y2_N18; Fanout = 2; COMB Node = 'Add0~1676'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1673 Add0~1676 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.316 ns Add0~1678 12 COMB LCCOMB_X30_Y2_N20 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 2.316 ns; Loc. = LCCOMB_X30_Y2_N20; Fanout = 2; COMB Node = 'Add0~1678'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1676 Add0~1678 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.402 ns Add0~1680 13 COMB LCCOMB_X30_Y2_N22 2 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 2.402 ns; Loc. = LCCOMB_X30_Y2_N22; Fanout = 2; COMB Node = 'Add0~1680'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1678 Add0~1680 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.488 ns Add0~1682 14 COMB LCCOMB_X30_Y2_N24 2 " "Info: 14: + IC(0.000 ns) + CELL(0.086 ns) = 2.488 ns; Loc. = LCCOMB_X30_Y2_N24; Fanout = 2; COMB Node = 'Add0~1682'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1680 Add0~1682 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.574 ns Add0~1684 15 COMB LCCOMB_X30_Y2_N26 2 " "Info: 15: + IC(0.000 ns) + CELL(0.086 ns) = 2.574 ns; Loc. = LCCOMB_X30_Y2_N26; Fanout = 2; COMB Node = 'Add0~1684'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1682 Add0~1684 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.660 ns Add0~1686 16 COMB LCCOMB_X30_Y2_N28 2 " "Info: 16: + IC(0.000 ns) + CELL(0.086 ns) = 2.660 ns; Loc. = LCCOMB_X30_Y2_N28; Fanout = 2; COMB Node = 'Add0~1686'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1684 Add0~1686 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.175 ns) 2.835 ns Add0~1688 17 COMB LCCOMB_X30_Y2_N30 2 " "Info: 17: + IC(0.000 ns) + CELL(0.175 ns) = 2.835 ns; Loc. = LCCOMB_X30_Y2_N30; Fanout = 2; COMB Node = 'Add0~1688'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.175 ns" { Add0~1686 Add0~1688 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.921 ns Add0~1690 18 COMB LCCOMB_X30_Y1_N0 2 " "Info: 18: + IC(0.000 ns) + CELL(0.086 ns) = 2.921 ns; Loc. = LCCOMB_X30_Y1_N0; Fanout = 2; COMB Node = 'Add0~1690'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1688 Add0~1690 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.007 ns Add0~1692 19 COMB LCCOMB_X30_Y1_N2 2 " "Info: 19: + IC(0.000 ns) + CELL(0.086 ns) = 3.007 ns; Loc. = LCCOMB_X30_Y1_N2; Fanout = 2; COMB Node = 'Add0~1692'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1690 Add0~1692 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.093 ns Add0~1694 20 COMB LCCOMB_X30_Y1_N4 2 " "Info: 20: + IC(0.000 ns) + CELL(0.086 ns) = 3.093 ns; Loc. = LCCOMB_X30_Y1_N4; Fanout = 2; COMB Node = 'Add0~1694'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1692 Add0~1694 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.179 ns Add0~1696 21 COMB LCCOMB_X30_Y1_N6 2 " "Info: 21: + IC(0.000 ns) + CELL(0.086 ns) = 3.179 ns; Loc. = LCCOMB_X30_Y1_N6; Fanout = 2; COMB Node = 'Add0~1696'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1694 Add0~1696 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.265 ns Add0~1698 22 COMB LCCOMB_X30_Y1_N8 2 " "Info: 22: + IC(0.000 ns) + CELL(0.086 ns) = 3.265 ns; Loc. = LCCOMB_X30_Y1_N8; Fanout = 2; COMB Node = 'Add0~1698'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1696 Add0~1698 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.351 ns Add0~1700 23 COMB LCCOMB_X30_Y1_N10 2 " "Info: 23: + IC(0.000 ns) + CELL(0.086 ns) = 3.351 ns; Loc. = LCCOMB_X30_Y1_N10; Fanout = 2; COMB Node = 'Add0~1700'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1698 Add0~1700 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.437 ns Add0~1702 24 COMB LCCOMB_X30_Y1_N12 2 " "Info: 24: + IC(0.000 ns) + CELL(0.086 ns) = 3.437 ns; Loc. = LCCOMB_X30_Y1_N12; Fanout = 2; COMB Node = 'Add0~1702'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1700 Add0~1702 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 3.627 ns Add0~1704 25 COMB LCCOMB_X30_Y1_N14 2 " "Info: 25: + IC(0.000 ns) + CELL(0.190 ns) = 3.627 ns; Loc. = LCCOMB_X30_Y1_N14; Fanout = 2; COMB Node = 'Add0~1704'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { Add0~1702 Add0~1704 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.713 ns Add0~1706 26 COMB LCCOMB_X30_Y1_N16 2 " "Info: 26: + IC(0.000 ns) + CELL(0.086 ns) = 3.713 ns; Loc. = LCCOMB_X30_Y1_N16; Fanout = 2; COMB Node = 'Add0~1706'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1704 Add0~1706 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.799 ns Add0~1708 27 COMB LCCOMB_X30_Y1_N18 2 " "Info: 27: + IC(0.000 ns) + CELL(0.086 ns) = 3.799 ns; Loc. = LCCOMB_X30_Y1_N18; Fanout = 2; COMB Node = 'Add0~1708'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1706 Add0~1708 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.885 ns Add0~1710 28 COMB LCCOMB_X30_Y1_N20 2 " "Info: 28: + IC(0.000 ns) + CELL(0.086 ns) = 3.885 ns; Loc. = LCCOMB_X30_Y1_N20; Fanout = 2; COMB Node = 'Add0~1710'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1708 Add0~1710 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.971 ns Add0~1712 29 COMB LCCOMB_X30_Y1_N22 2 " "Info: 29: + IC(0.000 ns) + CELL(0.086 ns) = 3.971 ns; Loc. = LCCOMB_X30_Y1_N22; Fanout = 2; COMB Node = 'Add0~1712'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1710 Add0~1712 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.057 ns Add0~1714 30 COMB LCCOMB_X30_Y1_N24 2 " "Info: 30: + IC(0.000 ns) + CELL(0.086 ns) = 4.057 ns; Loc. = LCCOMB_X30_Y1_N24; Fanout = 2; COMB Node = 'Add0~1714'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1712 Add0~1714 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.143 ns Add0~1716 31 COMB LCCOMB_X30_Y1_N26 2 " "Info: 31: + IC(0.000 ns) + CELL(0.086 ns) = 4.143 ns; Loc. = LCCOMB_X30_Y1_N26; Fanout = 2; COMB Node = 'Add0~1716'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1714 Add0~1716 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.229 ns Add0~1718 32 COMB LCCOMB_X30_Y1_N28 1 " "Info: 32: + IC(0.000 ns) + CELL(0.086 ns) = 4.229 ns; Loc. = LCCOMB_X30_Y1_N28; Fanout = 1; COMB Node = 'Add0~1718'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add0~1716 Add0~1718 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 4.735 ns Add0~1719 33 COMB LCCOMB_X30_Y1_N30 1 " "Info: 33: + IC(0.000 ns) + CELL(0.506 ns) = 4.735 ns; Loc. = LCCOMB_X30_Y1_N30; Fanout = 1; COMB Node = 'Add0~1719'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { Add0~1718 Add0~1719 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.116 ns) + CELL(0.370 ns) 6.221 ns Add0~1721 34 COMB LCCOMB_X29_Y2_N16 1 " "Info: 34: + IC(1.116 ns) + CELL(0.370 ns) = 6.221 ns; Loc. = LCCOMB_X29_Y2_N16; Fanout = 1; COMB Node = 'Add0~1721'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.486 ns" { Add0~1719 Add0~1721 } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 79 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 6.329 ns addr_b_from_key\[31\] 35 REG LCFF_X29_Y2_N17 2 " "Info: 35: + IC(0.000 ns) + CELL(0.108 ns) = 6.329 ns; Loc. = LCFF_X29_Y2_N17; Fanout = 2; REG Node = 'addr_b_from_key\[31\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { Add0~1721 addr_b_from_key[31] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.457 ns ( 70.42 % ) " "Info: Total cell delay = 4.457 ns ( 70.42 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.872 ns ( 29.58 % ) " "Info: Total interconnect delay = 1.872 ns ( 29.58 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.329 ns" { addr_b_from_key[0] Add0~1649 Add0~1652 Add0~1655 Add0~1658 Add0~1661 Add0~1664 Add0~1667 Add0~1670 Add0~1673 Add0~1676 Add0~1678 Add0~1680 Add0~1682 Add0~1684 Add0~1686 Add0~1688 Add0~1690 Add0~1692 Add0~1694 Add0~1696 Add0~1698 Add0~1700 Add0~1702 Add0~1704 Add0~1706 Add0~1708 Add0~1710 Add0~1712 Add0~1714 Add0~1716 Add0~1718 Add0~1719 Add0~1721 addr_b_from_key[31] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.329 ns" { addr_b_from_key[0] {} Add0~1649 {} Add0~1652 {} Add0~1655 {} Add0~1658 {} Add0~1661 {} Add0~1664 {} Add0~1667 {} Add0~1670 {} Add0~1673 {} Add0~1676 {} Add0~1678 {} Add0~1680 {} Add0~1682 {} Add0~1684 {} Add0~1686 {} Add0~1688 {} Add0~1690 {} Add0~1692 {} Add0~1694 {} Add0~1696 {} Add0~1698 {} Add0~1700 {} Add0~1702 {} Add0~1704 {} Add0~1706 {} Add0~1708 {} Add0~1710 {} Add0~1712 {} Add0~1714 {} Add0~1716 {} Add0~1718 {} Add0~1719 {} Add0~1721 {} addr_b_from_key[31] {} } { 0.000ns 0.756ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.116ns 0.000ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.175ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "keys\[0\] destination 3.040 ns + Shortest register " "Info: + Shortest clock path from clock \"keys\[0\]\" to destination register is 3.040 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.994 ns) 0.994 ns keys\[0\] 1 CLK PIN_97 40 " "Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_97; Fanout = 40; CLK Node = 'keys\[0\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { keys[0] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.380 ns) + CELL(0.666 ns) 3.040 ns addr_b_from_key\[31\] 2 REG LCFF_X29_Y2_N17 2 " "Info: 2: + IC(1.380 ns) + CELL(0.666 ns) = 3.040 ns; Loc. = LCFF_X29_Y2_N17; Fanout = 2; REG Node = 'addr_b_from_key\[31\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.046 ns" { keys[0] addr_b_from_key[31] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.660 ns ( 54.61 % ) " "Info: Total cell delay = 1.660 ns ( 54.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.380 ns ( 45.39 % ) " "Info: Total interconnect delay = 1.380 ns ( 45.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[31] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[31] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "keys\[0\] source 3.040 ns - Longest register " "Info: - Longest clock path from clock \"keys\[0\]\" to source register is 3.040 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.994 ns) 0.994 ns keys\[0\] 1 CLK PIN_97 40 " "Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_97; Fanout = 40; CLK Node = 'keys\[0\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { keys[0] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.380 ns) + CELL(0.666 ns) 3.040 ns addr_b_from_key\[0\] 2 REG LCFF_X29_Y2_N25 6 " "Info: 2: + IC(1.380 ns) + CELL(0.666 ns) = 3.040 ns; Loc. = LCFF_X29_Y2_N25; Fanout = 6; REG Node = 'addr_b_from_key\[0\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.046 ns" { keys[0] addr_b_from_key[0] } "NODE_NAME" } } { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.660 ns ( 54.61 % ) " "Info: Total cell delay = 1.660 ns ( 54.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.380 ns ( 45.39 % ) " "Info: Total interconnect delay = 1.380 ns ( 45.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[0] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[0] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[31] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[31] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[0] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[0] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "src/top.v" "" { Text "D:/baby/lab_dream/Liid/src/top.v" 75 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.329 ns" { addr_b_from_key[0] Add0~1649 Add0~1652 Add0~1655 Add0~1658 Add0~1661 Add0~1664 Add0~1667 Add0~1670 Add0~1673 Add0~1676 Add0~1678 Add0~1680 Add0~1682 Add0~1684 Add0~1686 Add0~1688 Add0~1690 Add0~1692 Add0~1694 Add0~1696 Add0~1698 Add0~1700 Add0~1702 Add0~1704 Add0~1706 Add0~1708 Add0~1710 Add0~1712 Add0~1714 Add0~1716 Add0~1718 Add0~1719 Add0~1721 addr_b_from_key[31] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.329 ns" { addr_b_from_key[0] {} Add0~1649 {} Add0~1652 {} Add0~1655 {} Add0~1658 {} Add0~1661 {} Add0~1664 {} Add0~1667 {} Add0~1670 {} Add0~1673 {} Add0~1676 {} Add0~1678 {} Add0~1680 {} Add0~1682 {} Add0~1684 {} Add0~1686 {} Add0~1688 {} Add0~1690 {} Add0~1692 {} Add0~1694 {} Add0~1696 {} Add0~1698 {} Add0~1700 {} Add0~1702 {} Add0~1704 {} Add0~1706 {} Add0~1708 {} Add0~1710 {} Add0~1712 {} Add0~1714 {} Add0~1716 {} Add0~1718 {} Add0~1719 {} Add0~1721 {} addr_b_from_key[31] {} } { 0.000ns 0.756ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.116ns 0.000ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.175ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[31] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[31] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } } { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.040 ns" { keys[0] addr_b_from_key[0] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "3.040 ns" { keys[0] {} keys[0]~combout {} addr_b_from_key[0] {} } { 0.000ns 0.000ns 1.380ns } { 0.000ns 0.994ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}

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