dip_pb_counter.map.qmsg

本程序有效的防止了按键的抖动

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 19 16:19:39 2009 " "Info: Processing started: Tue May 19 16:19:39 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off DIP_PB_Counter -c DIP_PB_Counter " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DIP_PB_Counter -c DIP_PB_Counter" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DIP_PB_Counter.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file DIP_PB_Counter.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIP_PB_Counter-rtl " "Info: Found design unit 1: DIP_PB_Counter-rtl" {  } { { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 36 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 DIP_PB_Counter " "Info: Found entity 1: DIP_PB_Counter" {  } { { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 27 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "DIP_PB_Counter " "Info: Elaborating entity \"DIP_PB_Counter\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "mincount DIP_PB_Counter.vhd(46) " "Warning (10540): VHDL Signal Declaration warning at DIP_PB_Counter.vhd(46): used explicit default value for signal \"mincount\" because signal was never assigned a value" {  } { { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 46 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "PB_PulseOut DIP_PB_Counter.vhd(104) " "Warning (10492): VHDL Process Statement warning at DIP_PB_Counter.vhd(104): signal \"PB_PulseOut\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 104 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 38 -1 0 } } { "DIP_PB_Counter.vhd" "" { Text "E:/专业/EDA/实验/DIP_PB_Counter/DIP_PB_Counter.vhd" 39 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "57 " "Info: Implemented 57 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "4 " "Info: Implemented 4 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "49 " "Info: Implemented 49 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "159 " "Info: Allocated 159 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 19 16:19:42 2009 " "Info: Processing ended: Tue May 19 16:19:42 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}