cai_bmq.rpt

vhdl32路彩灯设计 maxplus平台 比较齐全

         # !dzout0 &  dzout2 &  dzout3 &  dzout4 &  dzout5
         # !dzout2 & !dzout3 &  dzout4 & !dzout5 &  dzout6;

-- Node name is '~15774~3' 
-- Equation name is '~15774~3', location is LC116, type is buried.
-- synthesized logic cell 
_LC116   = LCELL( _EQ063 $  GND);
  _EQ063 = !dzout1 & !dzout3 &  dzout4 & !dzout5 &  dzout6
         # !dzout0 & !dzout1 & !dzout3 & !dzout4 & !dzout6
         # !dzout2 & !dzout3 & !dzout4 & !dzout6;

-- Node name is '~17238~1' 
-- Equation name is '~17238~1', location is LC103, type is buried.
-- synthesized logic cell 
_LC103   = LCELL( _EQ064 $  GND);
  _EQ064 =  dzout1 &  dzout3 & !dzout4 &  dzout5
         #  dzout1 & !dzout3 &  dzout5 &  dzout6;

-- Node name is '~17970~1' 
-- Equation name is '~17970~1', location is LC108, type is buried.
-- synthesized logic cell 
_LC108   = LCELL( _EQ065 $  GND);
  _EQ065 = !dzout1 & !dzout2 & !dzout4 & !dzout5 & !dzout6
         #  dzout0 &  dzout2 & !dzout4 &  dzout6;

-- Node name is '~17970~2' 
-- Equation name is '~17970~2', location is LC093, type is buried.
-- synthesized logic cell 
_LC093   = LCELL( _EQ066 $  GND);
  _EQ066 = !dzout2 & !dzout3 &  dzout4 &  dzout5;

-- Node name is '~18336~1' 
-- Equation name is '~18336~1', location is LC089, type is buried.
-- synthesized logic cell 
_LC089   = LCELL( _EQ067 $  GND);
  _EQ067 =  dzout2 &  dzout3 & !dzout4 &  dzout5
         #  dzout2 & !dzout4 &  dzout5 &  dzout6;

-- Node name is '~18336~2' 
-- Equation name is '~18336~2', location is LC083, type is buried.
-- synthesized logic cell 
_LC083   = LCELL( _EQ068 $  GND);
  _EQ068 = !dzout2 & !dzout3 &  dzout4 &  dzout6;

-- Node name is '~18336~3' 
-- Equation name is '~18336~3', location is LC087, type is buried.
-- synthesized logic cell 
_LC087   = LCELL( _EQ069 $  GND);
  _EQ069 = !dzout3 & !dzout4 & !dzout5 & !dzout6;

-- Node name is '~19068~1' 
-- Equation name is '~19068~1', location is LC094, type is buried.
-- synthesized logic cell 
_LC094   = LCELL( _EQ070 $  GND);
  _EQ070 =  dzout2 & !dzout3 & !dzout4 & !dzout5
         # !dzout2 & !dzout4 & !dzout5 & !dzout6;

-- Node name is '~19434~1' 
-- Equation name is '~19434~1', location is LC098, type is buried.
-- synthesized logic cell 
_LC098   = LCELL( _EQ071 $  GND);
  _EQ071 =  dzout0 & !dzout2 & !dzout4 & !dzout5
         # !dzout1 &  dzout2 & !dzout4 & !dzout5
         # !dzout0 & !dzout4 & !dzout5 & !dzout6;

-- Node name is '~19434~2' 
-- Equation name is '~19434~2', location is LC068, type is buried.
-- synthesized logic cell 
_LC068   = LCELL( _EQ072 $  GND);
  _EQ072 =  dzout3 & !dzout4 &  dzout6;

-- Node name is '~20166~1' 
-- Equation name is '~20166~1', location is LC090, type is buried.
-- synthesized logic cell 
_LC090   = LCELL( _EQ073 $  GND);
  _EQ073 =  dzout2 &  dzout3 & !dzout4 &  dzout6
         # !dzout4 &  dzout5 &  dzout6
         # !dzout3 &  dzout4 &  dzout5
         #  dzout3 & !dzout4 &  dzout5;

-- Node name is '~20166~2' 
-- Equation name is '~20166~2', location is LC095, type is buried.
-- synthesized logic cell 
_LC095   = LCELL( _EQ074 $  GND);
  _EQ074 = !dzout0 &  dzout4 &  dzout5 & !dzout6;

-- Node name is '~20898~1' 
-- Equation name is '~20898~1', location is LC084, type is buried.
-- synthesized logic cell 
_LC084   = LCELL( _EQ075 $  GND);
  _EQ075 = !dzout0 & !dzout2 & !dzout3 &  dzout4
         #  dzout2 &  dzout3 & !dzout4
         #  dzout2 & !dzout4 & !dzout5;

-- Node name is '~21630~1' 
-- Equation name is '~21630~1', location is LC121, type is buried.
-- synthesized logic cell 
_LC121   = LCELL( _EQ076 $  GND);
  _EQ076 =  dzout1 &  dzout2 & !dzout4 & !dzout5
         #  dzout1 &  dzout3 & !dzout4 & !dzout6
         #  dzout2 &  dzout3 & !dzout4 & !dzout6
         # !dzout0 & !dzout1 & !dzout3 &  dzout4;

-- Node name is '~21630~2' 
-- Equation name is '~21630~2', location is LC067, type is buried.
-- synthesized logic cell 
_LC067   = LCELL( _EQ077 $  GND);
  _EQ077 = !dzout1 & !dzout3 &  dzout4 &  dzout6;

-- Node name is '~21996~1' 
-- Equation name is '~21996~1', location is LC066, type is buried.
-- synthesized logic cell 
_LC066   = LCELL( _EQ078 $  GND);
  _EQ078 = !dzout3 &  dzout4 &  dzout5 &  dzout6;

-- Node name is '~21996~2' 
-- Equation name is '~21996~2', location is LC082, type is buried.
-- synthesized logic cell 
_LC082   = LCELL( _EQ079 $  GND);
  _EQ079 = !dzout0 & !dzout1 & !dzout2 &  dzout4 &  dzout5 &  dzout6;

-- Node name is '~22728~1' 
-- Equation name is '~22728~1', location is LC122, type is buried.
-- synthesized logic cell 
_LC122   = LCELL( _EQ080 $  GND);
  _EQ080 =  dzout0 &  dzout1 &  dzout2 & !dzout4 & !dzout6
         #  dzout0 &  dzout3 & !dzout4 & !dzout5;

-- Node name is '~22728~2' 
-- Equation name is '~22728~2', location is LC071, type is buried.
-- synthesized logic cell 
_LC071   = LCELL( _EQ081 $  GND);
  _EQ081 =  dzout0 &  dzout4 &  dzout5 & !dzout6;

-- Node name is '~23094~1' 
-- Equation name is '~23094~1', location is LC125, type is buried.
-- synthesized logic cell 
_LC125   = LCELL( _EQ082 $  GND);
  _EQ082 =  dzout1 &  dzout2 & !dzout4 & !dzout6
         # !dzout1 &  dzout2 & !dzout3 &  dzout4
         # !dzout0 & !dzout3 &  dzout4 & !dzout5;

-- Node name is '~23094~2' 
-- Equation name is '~23094~2', location is LC075, type is buried.
-- synthesized logic cell 
_LC075   = LCELL( _EQ083 $  GND);
  _EQ083 = !dzout4 & !dzout5 & !dzout6;

-- Node name is '~23460~1' 
-- Equation name is '~23460~1', location is LC057, type is buried.
-- synthesized logic cell 
_LC057   = LCELL( _EQ084 $  GND);
  _EQ084 =  dzout2 & !dzout3 &  dzout4 &  dzout5
         #  dzout0 &  dzout2 & !dzout3 & !dzout6
         #  dzout1 &  dzout2 & !dzout3 & !dzout6
         # !dzout1 & !dzout3 &  dzout4 & !dzout5
         # !dzout1 & !dzout2 & !dzout5 & !dzout6;

-- Node name is '~23826~1' 
-- Equation name is '~23826~1', location is LC091, type is buried.
-- synthesized logic cell 
_LC091   = LCELL( _EQ085 $  GND);
  _EQ085 = !dzout1 & !dzout2 &  dzout3 & !dzout6
         # !dzout0 & !dzout2 & !dzout5 & !dzout6;

-- Node name is '~23826~2' 
-- Equation name is '~23826~2', location is LC076, type is buried.
-- synthesized logic cell 
_LC076   = LCELL( _EQ086 $  GND);
  _EQ086 =  dzout2 &  dzout3 & !dzout4 & !dzout5;

-- Node name is '~24192~1' 
-- Equation name is '~24192~1', location is LC063, type is buried.
-- synthesized logic cell 
_LC063   = LCELL( _EQ087 $  GND);
  _EQ087 =  dzout1 &  dzout2 &  dzout3 & !dzout4 & !dzout5
         #  dzout0 &  dzout2 &  dzout5 & !dzout6
         #  dzout0 &  dzout1 & !dzout3 & !dzout6
         # !dzout2 &  dzout3 & !dzout6
         # !dzout2 & !dzout5 & !dzout6;

-- Node name is '~24192~2' 
-- Equation name is '~24192~2', location is LC092, type is buried.
-- synthesized logic cell 
_LC092   = LCELL( _EQ088 $  GND);
  _EQ088 = !dzout2 & !dzout3 &  dzout4 & !dzout5
         # !dzout3 &  dzout4 & !dzout6;

-- Node name is '~24192~3' 
-- Equation name is '~24192~3', location is LC072, type is buried.
-- synthesized logic cell 
_LC072   = LCELL( _EQ089 $  GND);
  _EQ089 =  dzout3 & !dzout4 & !dzout6;

-- Node name is '~24558~1' 
-- Equation name is '~24558~1', location is LC101, type is buried.
-- synthesized logic cell 
_LC101   = LCELL( _EQ090 $  GND);
  _EQ090 =  dzout1 &  dzout2 & !dzout3 &  dzout4 &  dzout5 &  dzout6
         # !dzout1 & !dzout2 & !dzout3 & !dzout4 &  dzout5 & !dzout6
         #  dzout0 &  dzout2 &  dzout3 &  dzout4 & !dzout6;

-- Node name is '~24924~1' 
-- Equation name is '~24924~1', location is LC106, type is buried.
-- synthesized logic cell 
_LC106   = LCELL( _EQ091 $  GND);
  _EQ091 =  dzout0 &  dzout1 &  dzout2 & !dzout3 &  dzout4 &  dzout5 & 
              dzout6
         # !dzout0 & !dzout1 & !dzout2 & !dzout3 & !dzout4 &  dzout5 & 
             !dzout6
         # !dzout0 &  dzout1 &  dzout2 &  dzout3 &  dzout4 & !dzout6;

-- Node name is '~25290~1' 
-- Equation name is '~25290~1', location is LC111, type is buried.
-- synthesized logic cell 
_LC111   = LCELL( _EQ092 $  GND);
  _EQ092 = !dzout0 & !dzout1 & !dzout2 &  dzout3 &  dzout4 &  dzout5 & 
              dzout6
         #  dzout1 &  dzout2 &  dzout3 &  dzout4 & !dzout5 & !dzout6;



--     Shareable expanders that are duplicated in multiple LABs:
--    _X003 occurs in LABs D, E
--    _X008 occurs in LABs F, G
--    _X012 occurs in LABs C, E, H
--    _X014 occurs in LABs C, F, H
--    _X015 occurs in LABs C, G
--    _X021 occurs in LABs C, G
--    _X024 occurs in LABs C, E
--    _X027 occurs in LABs F, H
--    _X028 occurs in LABs E, F
--    _X035 occurs in LABs E, H
--    _X036 occurs in LABs E, H
--    _X041 occurs in LABs F, H




Project Information                                        c:\work\cai_bmq.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Standard

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'MAX3000A' family

      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      PARALLEL_EXPANDERS                  = off
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SOFT_BUFFER_INSERTION               = on
      SUBFACTOR_EXTRACTION                = on
      TURBO_BIT                           = on
      XOR_SYNTHESIS                       = on
      IGNOR