operand_select_gti.vhd

Xilinx软核microblaze源码(VHDL)版本7.10

  --***************************************************************************
  --***************************************************************************
  ----------------------------------------
  -- OF_Branch_CMP_Sel_PROCESS
  -- mux to select the value for branch compare
  -- this is then used for Op1
  ----------------------------------------
  OF_Branch_CMP_Sel_PROCESS : process (EX_Fwd, GPR_Op1, MEM_Fwd, OF_Op1_Sel,
                                       WB_Fwd) is
  begin
    case OF_Op1_Sel is
      when "00"   => of_branch_cmp <= GPR_Op1;
      when "01"   => of_branch_cmp <= EX_Fwd;
      when "10"   => of_branch_cmp <= MEM_Fwd;
      when "11"   => of_branch_cmp <= WB_Fwd;
      when others => null;
    end case;
  end process OF_Branch_CMP_Sel_PROCESS;

  -----------------------------------------------------------------------------
  -- OF_Op1_SPR_Sel_PROCESS
  -----------------------------------------------------------------------------
  OF_Op1_SPR_Sel_PROCESS : process(EX_MSR, OF_Op1_Sel_SPR_PC, OF_PC)
  begin  -- process OF_Op1_SPR_Sel_PROCESS
    -- default
    if OF_Op1_Sel_SPR_PC then
      of_spr <= OF_PC;
--    elsif OF_Op1_Sel_SPR_MSR then
    else
      of_spr <= EX_MSR;
    end if;
  end process OF_Op1_SPR_Sel_PROCESS;

  ----------------------------------------
  -- OF_Op1_Sel_PROCESS
  -- mux to select the value for Op1
  ----------------------------------------
  OF_Op1_Sel_PROCESS : process (OF_Op1_Sel_SPR, of_branch_cmp, of_spr) is
  begin
    -- default to branch compare result
    -- The result of muxing GPR_Op1 and forwarding
    of_op1 <= of_branch_cmp;

    if OF_Op1_Sel_SPR then
      -- Special purpose register
      of_op1 <= of_spr;
    end if;
  end process OF_Op1_Sel_PROCESS;

  ----------------------------------------
  -- OF_Op2_Sel_PROCESS
  -- mux to select the value for Op2
  ----------------------------------------
  OF_Op2_Sel_PROCESS : process (EX_Fwd, GPR_Op2, MEM_Fwd, OF_Op2_Sel_Imm,
                                OF_Take_Exception, OF_Take_Interrupt, WB_Fwd,
                                OF_Take_Ext_BRK, of_op2_sel, op2_imm) is
    variable of_op2_imm_addr : DATA_TYPE;
  begin

    if (OF_Take_Interrupt) then
      of_op2_imm_addr := INTERRUPT_ADDR;
    elsif (OF_Take_Ext_BRK) then
      of_op2_imm_addr := EXT_BRK_ADDR;
    elsif (OF_Take_Exception) then
      of_op2_imm_addr := EXCEPTION_ADDR;
    elsif OF_Op2_Sel_Imm then
      of_op2_imm_addr := op2_imm;
    else
      of_op2_imm_addr := GPR_Op2;
    end if;

    case of_op2_sel is
      when "00"   => of_op2 <= of_op2_imm_addr;
      when "01"   => of_op2 <= EX_Fwd;
      when "10"   => of_op2 <= MEM_Fwd;
      when "11"   => of_op2 <= WB_Fwd;
      when others => null;
    end case;
  end process OF_Op2_Sel_PROCESS;

  ----------------------------------------
  -- Op2_Imm_Sel_PROCESS
  -- Mux to select between sign extended immediate field
  -- and the immediate register extended immediate field
  ----------------------------------------
  Op2_Imm_Sel_PROCESS: process (OF_Read_imm_Reg, extend_imm, sign_imm) is
  begin
    if OF_Read_imm_Reg then
      op2_imm <= extend_imm;
    else
      op2_imm <= sign_imm;
    end if;
  end process Op2_Imm_Sel_PROCESS;

  ----------------------------------------
  -- Sign_Imm_PROCESS
  -- Sign extend the immediate field of the instruction
  -- This is only used if the immediate register is not used
  ----------------------------------------
  Sign_Imm_PROCESS: process (OF_Imm_Data) is
  begin
    sign_imm                                        <= (others => OF_Imm_Data(0));
    sign_imm(DATA_TYPE'right-15 to DATA_TYPE'right) <= OF_Imm_Data;
  end process Sign_Imm_PROCESS;

  ----------------------------------------
  -- Extend_Imm_PROCESS
  -- Combine the immediate register with the immediate field of the instruction
  -- This is only used if the immediate register is used
  ----------------------------------------
  Extend_Imm_PROCESS: process (OF_Imm_Data, imm_reg) is
  begin
    extend_imm(0 to DATA_TYPE'right-16)               <= imm_reg;
    extend_imm(DATA_TYPE'right-15 to DATA_TYPE'right) <= OF_Imm_Data;
  end process Extend_Imm_PROCESS;

  ----------------------------------------
  -- Imm_Reg_DFF
  -- Immediate Register
  -- This is written to with an imm instruction
  ----------------------------------------
  Imm_Reg_DFF: process (Clk) is
  begin
    if Clk'event and Clk = '1' then
      if Reset = '1' then
        imm_reg <= (others => '0');
      elsif OF_Write_Imm_Reg then
        imm_reg <= OF_Imm_Data;
      end if;
    end if;
  end process Imm_Reg_DFF;

  ----------------------------------------
  -- OF_Op3_Sel_PROCESS
  -- mux to select the value for Op3
  ----------------------------------------
  OF_Op3_Sel_PROCESS : process (EX_Fwd, GPR_Op3, MEM_Fwd, OF_Op3_Sel, WB_Fwd) is
  begin
    case OF_Op3_Sel is
      when "00"   => of_op3 <= GPR_Op3;
      when "01"   => of_op3 <= EX_Fwd;
      when "10"   => of_op3 <= MEM_Fwd;
      when "11"   => of_op3 <= WB_Fwd;
      when others => null;
    end case;
  end process OF_Op3_Sel_PROCESS;

  --***************************************************************************
  --***************************************************************************
  --                   Execution (EX) stage handling
  --***************************************************************************
  --***************************************************************************

  ----------------------------------------
  -- EX_Op1_DFF
  -- EX stage operand 1
  ----------------------------------------
  EX_Op1_DFF: process (Clk) is
  begin
    if Clk'event and Clk = '1' then
      if (Reset = '1') then
        EX_Op1 <= (others => '0');
      elsif OF_PipeRun then
        EX_Op1 <= of_op1;
      end if;
    end if;
  end process EX_Op1_DFF;

  ----------------------------------------
  -- EX_Op2_DFF
  -- EX stage operand 2
  ----------------------------------------
  EX_Op2_DFF: process (Clk) is
  begin
    if Clk'event and Clk = '1' then
      if Reset = '1' then
        EX_Op2 <= (others => '0');
      elsif OF_PipeRun then
        EX_Op2 <= of_op2;
      end if;
    end if;
  end process EX_Op2_DFF;

  ----------------------------------------
  -- EX_Op3_DFF
  -- data bus data to write before it is mirrored
  -- aka ex_pre_mirror_write_data
  ----------------------------------------
  EX_Op3_DFF: process (Clk) is
  begin
    if Clk'event and Clk = '1' then -- rising clock edge
      if Reset = '1' then
        EX_Op3 <=  (others => '0');
      elsif OF_PipeRun then
        EX_Op3 <= of_op3;
      end if;
    end if;
  end process EX_Op3_DFF;

  ----------------------------------------
  -- EX_Branch_CMP_Op1_DFF
  -- Execute stage operand 1 with out the SPR muxed in
  ----------------------------------------
  EX_Branch_CMP_Op1_DFF: process (Clk) is
  begin
    if Clk'event and Clk = '1' then
      if Reset = '1' then
        EX_Branch_CMP_Op1 <= (others => '0');
      elsif OF_PipeRun then
        EX_Branch_CMP_Op1 <= of_branch_cmp;
      end if;
    end if;
  end process EX_Branch_CMP_Op1_DFF;

end architecture IMP;