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📄 decode_gti.vhd

📁 Xilinx软核microblaze源码(VHDL)版本7.10
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  signal ex_dbg_pc_hit_masked       : boolean;  signal if_hold_incr_MMU         : boolean;  signal if_hold_incr_MMU_1       : boolean;  signal if_valid_req_prev_i      : boolean;  signal if_instr_storage_excep1  : std_logic;  signal if_instr_tlb_miss_excep1 : std_logic;  signal ib_excep_ready           : std_logic;  signal ib_vmode_i               : std_logic;  -----------------------------------------------------------------------------  -- Signals for the OF stage  -----------------------------------------------------------------------------  signal of_buffer_sel      : slv_0to1;  signal of_PipeRun_i       : boolean;  signal of_PipeRun_Prefetch: std_logic;  signal of_PipeRun_s       : std_logic;  signal of_valid           : boolean;  signal of_instr           : DATA_TYPE;  signal of_predecode       : std_logic_vector(0 to 10);  signal of_Instr_Exception : std_logic;  signal of_opcode          : OPCODE_TYPE;  signal of_Instr_Storage_Excep  : std_logic;  signal of_Instr_TLB_Miss_Excep : std_logic;  signal of_is_fpu_instr    : boolean;  signal of_is_div_instr    : boolean;  signal of_is_mul_instr    : boolean;  signal of_Ext_NM_BRK      : boolean;  signal of_Ext_BRK         : boolean;  signal of_Interrupt       : boolean;  signal of_Take_Interrupt_i    : boolean;  signal of_Take_Interrupt_hold : boolean;  signal of_Take_Ext_BRK_i    : boolean;  signal of_Take_Ext_BRK_hold : boolean;  signal OF_Take_Exception_i    : boolean;  signal OF_Take_Exception_hold : boolean;  signal of_Take_Intr_Exc_Brk : boolean;    signal of_is_branch                   : boolean;  signal of_is_store                    : boolean;  signal of_op1_read_addr  : GPR_ADDR_TYPE;  signal of_op2_read_addr  : GPR_ADDR_TYPE;  signal of_op3_read_addr  : GPR_ADDR_TYPE;  signal of_gpr_write_addr : GPR_ADDR_TYPE;  signal of_use_op1 : boolean;  signal of_use_op2 : boolean;  signal of_use_imm : boolean;  signal of_stall_reg_conflict : boolean;  signal of_div_stall : boolean;    signal of_which_branch : std_logic_vector(BXX_POS_TYPE);  signal of_read_ex_write_op1_conflict  : boolean;  signal of_read_ex_write_op2_conflict  : boolean;  signal of_read_ex_write_op3_conflict  : boolean;  signal of_read_mem_write_op1_conflict : boolean;  signal of_read_mem_write_op2_conflict : boolean;  signal of_read_mem_write_op3_conflict : boolean;  signal of_read_wb_write_op1_conflict  : boolean;  signal of_read_wb_write_op2_conflict  : boolean;  signal of_read_wb_write_op3_conflict  : boolean;    signal of_read_imm_reg_ii : boolean;  signal of_read_imm_reg_i  : boolean;  signal of_Sel_SPR_MSR : boolean;  signal of_Sel_SPR_ESR : boolean;  signal of_Sel_SPR_EAR : boolean;  signal of_Sel_SPR_EDR : boolean;  signal of_Sel_SPR_FSR : boolean;  signal of_Sel_SPR_PVR : boolean;  signal of_Sel_SPR_BTR : boolean;  signal of_Sel_SPR_PID   : boolean;  signal of_Sel_SPR_ZPR   : boolean;  signal of_Sel_SPR_TLBX  : boolean;  signal of_Sel_SPR_TLBLO : boolean;  signal of_Sel_SPR_TLBHI : boolean;  signal of_op1_sel_spr_i : boolean;  signal of_PVR_Select  : std_logic_vector(0 to 3);  -- Selected PVR register  signal of_pipe_ctrl        : std_logic_vector(1 to 10);  signal of_PipeRun_carry    : std_logic_vector(0 to 10);  signal of_Imm8_Imm18                  : boolean;  signal of_Brki                        : boolean;  signal of_Priv_Msr                    : boolean;  signal of_Priv_Brki                   : boolean;  signal of_Priv_Instr                  : boolean;  signal of_Priv_Instr_Excep            : rboolean;  signal of_Instr_Storage_Excep_active  : rboolean;  signal of_Instr_TLB_Miss_Excep_active : rboolean;  signal ex_Priv_Instr_Excep            : rboolean;  signal ex_Instr_Storage_Excep         : rboolean;  signal ex_Instr_TLB_Miss_Excep        : rboolean;  -----------------------------------------------------------------------------  -- Signals for the EX stage  -----------------------------------------------------------------------------  signal ex_instr    : DATA_TYPE;  signal ex_Take_Intr_or_Exc : boolean;    signal ex_opcode           : OPCODE_TYPE;  signal ex_PipeRun_i        : boolean;  signal ex_PipeRun_dbg      : boolean;  signal ex_start_div_i : boolean;  signal ex_branch_instr          : boolean;  signal ex_which_branch          : std_logic_vector(BXX_POS_TYPE);  signal ex_jump_nodelay          : boolean;  signal ex_jump                  : boolean;  signal ex_jump_stall            : boolean;  signal ex_ignore_delayslot      : boolean;  signal ex_ignore_delayslot_hold : boolean;  signal ex_delayslot_Instr       : boolean;  signal ex_read_imm_reg          : boolean;  signal ex_read_imm_reg_1        : boolean;  signal keep_jump_taken_with_ds  : boolean;  signal if_addr_lookup_MMU       : rboolean;  -- signal ex_write_carry_i    : boolean;  signal of_next_ex_valid          : boolean;  signal ex_valid_keep             : boolean;  signal ex_valid                  : boolean;  signal ex_valid_jump             : boolean;  signal ex_first_cycle            : boolean;  signal ex_gpr_write              : boolean;  signal ex_gpr_write_dbg          : boolean;  signal ex_gpr_write_addr         : GPR_ADDR_TYPE;  signal ex_load_store_instr       : boolean;  signal ex_is_multi_or_load_instr : boolean;  signal ex_is_multi_instr2        : boolean;  signal ex_is_mul_instr           : boolean;  signal ex_is_fpu_instr           : boolean;  signal ex_is_div_instr_I         : boolean;  signal ex_is_bs_instr_I          : boolean;  signal ex_is_fsl_instr           : boolean;  signal ex_is_load_instr          : boolean;  signal ex_byte_access_i          : boolean;  signal ex_doublet_access_i       : boolean;  signal ex_start_fpu_i            : boolean;  signal allow_ext_nm_brk : boolean;  signal allow_ext_brk    : boolean;  signal allow_ext_int    : boolean;  signal ex_Ext_NM_BRK    : boolean;  signal ex_Ext_BRK       : boolean;  signal ex_Ext_NM_BRK_i  : boolean;  signal ex_Ext_BRK_i     : boolean;  signal ex_Interrupt_i   : boolean;  signal ex_Interrupt     : boolean;    signal ex_dec_instr          : DEC_OP_TYPE;  signal ex_sel_alu_i        : boolean;  signal ex_load_alu_carry   : boolean;  signal ex_load_shift_carry : boolean;  signal ex_Write_ICache      : boolean;  signal ex_Write_DCache      : boolean;  signal ex_write_cache_stall : boolean;  signal ex_Sel_SPR_ESR : boolean;  signal ex_Sel_SPR_EAR : boolean;  signal ex_Sel_SPR_EDR : boolean;  signal ex_Sel_SPR_FSR : boolean;  signal ex_Sel_SPR_PVR : boolean;  signal ex_Sel_SPR_BTR : boolean;  signal ex_PVR_Select  : std_logic_vector(0 to 3);  -- Selected PVR register  signal ex_Sel_SPR_PID     : rboolean;  signal ex_Sel_SPR_ZPR     : rboolean;  signal ex_Sel_SPR_TLBX    : rboolean;  signal ex_Sel_SPR_TLBLO_I : rboolean;  signal ex_Sel_SPR_TLBHI_I : rboolean;  signal ex_fpu_div_op : boolean;   signal ex_fpu_cmp_op : boolean;    signal ex_databus_addr_i   : DATA_TYPE;  signal ex_databus_access_i : std_logic;  signal ex_databus_read_i   : std_logic;  signal ex_databus_write_i  : std_logic;  signal ex_not_mul_op_i  : rboolean;  signal ex_mulh_instr_i  : rboolean;  signal ex_mulhu_instr_i : rboolean;  signal ex_mulhsu_instr_i : rboolean;  -----------------------------------------------------------------------------  -- Signals for the MEM stage  -----------------------------------------------------------------------------  signal mem_PipeRun_i        : boolean;  signal mem_PipeRun_dbg      : boolean;  signal mem_valid            : boolean;  signal mem_instr            : DATA_TYPE;  signal mem_gpr_write        : boolean;  signal mem_gpr_write_dbg    : boolean;  signal mem_gpr_write_addr   : GPR_ADDR_TYPE;  signal mem_load_store_instr : boolean;  signal mem_is_multi_or_load_instr   : boolean;  signal mem_is_mul_instr     : boolean;  signal mem_is_fpu_instr     : boolean;  signal mem_is_bs_instr      : boolean;  signal mem_is_div_instr_I   : boolean;  signal mem_is_fsl_instr     : boolean;  signal mem_is_msr_fsl_instr : boolean;  signal mem_is_load_instr    : boolean;  signal mem_is_store_instr   : boolean;  signal mem_word_access      : boolean;  signal mem_wait_on_ready    : boolean;  signal mem_byte_access      : boolean;  signal mem_doublet_access   : boolean;  signal mem_dec_instr        : DEC_OP_TYPE;  signal mem_delayslot_instr  : boolean;  signal mem_read_imm_reg     : boolean;  signal mem_read_imm_reg_1   : boolean;  signal mem_Write_ICache : boolean;  signal mem_Write_DCache : boolean;  signal mem_Sel_SPR_ESR_I  : boolean;  signal mem_Sel_SPR_EAR_I  : boolean;  signal mem_Sel_SPR_EDR_I  : boolean;  signal mem_Sel_SPR_FSR_I  : boolean;  signal mem_Sel_SPR_PVR_I  : boolean;  signal mem_Sel_SPR_BTR_I  : boolean;  signal mem_Sel_SPR_PID_I   : rboolean;  signal mem_Sel_SPR_ZPR_I   : rboolean;  signal mem_Sel_SPR_TLBX_I  : rboolean;  signal mem_Sel_SPR_TLBLO_I : rboolean;  signal mem_Sel_SPR_TLBHI_I : rboolean;  signal MEM_Sel_MEM_Res_I    : boolean;  signal mem_jump_taken  : boolean;    -----------------------------------------------------------------------------  -- Signals for the WB stage  -----------------------------------------------------------------------------  signal wb_PipeRun_i        : boolean;  signal wb_valid            : boolean;  signal wb_instr            : DATA_TYPE;  signal wb_gpr_write        : boolean;  signal wb_gpr_write_no_exc : boolean;  signal wb_gpr_write_dbg    : boolean;  signal wb_gpr_write_i      : boolean;  signal wb_gpr_write_addr   : GPR_ADDR_TYPE;  signal wb_dec_instr        : DEC_OP_TYPE;  signal wb_is_mul_instr     : boolean;  signal wb_is_fpu_instr     : boolean;  signal wb_Write_ICache_i : boolean;  signal wb_Write_DCache_i : boolean;  signal set_MSR_IE_after_delayslot : std_logic;  signal ex_move_to_MSR_instr       : boolean;  signal ex_move_to_FSR_instr       : boolean;  signal ex_atomic_Instruction_Pair : boolean;  signal ex_mmu_mts             : boolean;  signal ex_return_to_VM        : std_logic;  signal ex_move_to_PID_instr   : boolean;  signal ex_move_to_ZPR_instr   : boolean;  signal ex_move_to_TLBX_instr  : boolean;  signal ex_move_to_TLBLO_instr : boolean;  signal ex_move_to_TLBHI_instr : boolean;  signal ex_move_to_TLBSX_instr : boolean;  signal of_Imm_Instr             : boolean;  signal of_branch_with_delayslot : boolean;

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