microblaze_isa_be_pkg.vhd

Xilinx软核microblaze源码(VHDL)版本7.10

  constant EXT_SPR_BTR_DEC : std_logic_vector := "101";
  constant EXT_SPR_EDR_DEC : std_logic_vector := "110";

  -- When MMU_POS = MMU_DEC
  subtype  EXT_SPR_MMU_POS_TYPE is natural range 29 to 31;
  constant EXT_SPR_PID_DEC   : std_logic_vector := "000";
  constant EXT_SPR_ZPR_DEC   : std_logic_vector := "001";
  constant EXT_SPR_TLBX_DEC  : std_logic_vector := "010";
  constant EXT_SPR_TLBLO_DEC : std_logic_vector := "011";
  constant EXT_SPR_TLBHI_DEC : std_logic_vector := "100";
  constant EXT_SPR_TLBSX_DEC : std_logic_vector := "101";

  -- Opcode and bits for MSRset and MSRclr
  constant MSRxxx_POS     : natural   := 16;
  constant EXT_MXS_DEC    : std_logic := '1';
  constant EXT_MSRXXX_DEC : std_logic := '0';
  constant MSRclr_POS     : natural   := 15;

  subtype  DEC_OP_TYPE is std_logic_vector(0 to 2);
  constant DEC_MFS_POS    : natural := 0;
  constant DEC_MSRCLR_POS : natural := 1;
  constant DEC_MSRSET_POS : natural := 2;

  -- Imm opcode
  constant IMM_DEC : OPCODE_TYPE := "101100";

  -- RTx opcode and bit location for RTI or RTS
  constant RTX_DEC : OPCODE_TYPE := "101101";
  constant RTX_POS : natural     := 10;
  constant RTB_POS : natural     := 9;
  constant RTE_POS : natural     := 8;
  constant RTS_DEC : std_logic   := '0';
  constant RTI_DEC : std_logic   := '1';
  constant RTB_DEC : std_logic   := '1';
  constant RTE_DEC : std_logic   := '1';

  -- Any type of branch
  constant BRXX_BXX_DEC : OPCODE_TYPE := "10-11-";

  -- BRxx opcodes
  constant BRXX_DEC  : OPCODE_TYPE := "100110";
  constant BRXXI_DEC : OPCODE_TYPE := "101110";

  constant BRXX_DELAY_POS    : natural   := 11;
  constant BRXX_NO_DELAY_DEC : std_logic := '0';
  constant BRXX_DELAY_DEC    : std_logic := '1';

  constant BRXX_ABS_POS    : natural   := 12;  -- Absolute
  constant BRXX_ABS_DEC    : std_logic := '1';
  constant BRXX_NOABS_DEC  : std_logic := '0';
  constant BRXX_LINK_POS   : natural   := 13;  -- Link Save PC
  constant BRXX_LINK_DEC   : std_logic := '1';
  constant BRXX_NOLINK_DEC : std_logic := '0';

  subtype  BRK_POS_TYPE is natural range 11 to 13;
  -- No delay slot, but absolute and with linking
  constant BRK_DEC : std_logic_vector(0 to 2) := "011";
  constant BRALID_DEC : std_logic_vector(0 to 2) := "111";

  -- Bxx opcodes
  constant BXX_DEC          : OPCODE_TYPE := "100111";
  constant BXXI_DEC         : OPCODE_TYPE := "101111";
  subtype  BXX_POS_TYPE is natural range 8 to 10;
  -- delay slot enable
  constant BXX_DELAY_POS    : natural     := 6;
  constant BXX_NO_DELAY_DEC : std_logic   := '0';
  constant BXX_DELAY_DEC    : std_logic   := '1';

  constant BEQ_DEC : std_logic_vector(0 to 2) := "000";
  constant BNE_DEC : std_logic_vector(0 to 2) := "001";
  constant BLT_DEC : std_logic_vector(0 to 2) := "010";
  constant BLE_DEC : std_logic_vector(0 to 2) := "011";
  constant BGT_DEC : std_logic_vector(0 to 2) := "100";
  constant BGE_DEC : std_logic_vector(0 to 2) := "101";

  -- Load/Store opcodes
  constant LBU_DEC  : OPCODE_TYPE := "110000";
  constant LHU_DEC  : OPCODE_TYPE := "110001";
  constant LW_DEC   : OPCODE_TYPE := "110010";
  constant SB_DEC   : OPCODE_TYPE := "110100";
  constant SH_DEC   : OPCODE_TYPE := "110101";
  constant SW_DEC   : OPCODE_TYPE := "110110";
  constant LBUI_DEC : OPCODE_TYPE := "111000";
  constant LHUI_DEC : OPCODE_TYPE := "111001";
  constant LWI_DEC  : OPCODE_TYPE := "111010";
  constant SBI_DEC  : OPCODE_TYPE := "111100";
  constant SHI_DEC  : OPCODE_TYPE := "111101";
  constant SWI_DEC  : OPCODE_TYPE := "111110";

  -- FSL opcodes
  subtype  RESULT_SUB_SEL_POS_TYPE is natural range 4 to 5;
  constant MULTI_FSL_INSTR_DEC : std_logic_vector(4 to 5) := "11";
  
  constant FSL_STAT_DEC   : OPCODE_TYPE := "011011";
  constant FSL_DYN_DEC    : OPCODE_TYPE := "010011";

  constant FSL_STAT_OP_POS_TYPE     : natural := 16;
  constant FSL_STAT_BLOCK_POS_TYPE  : natural := 17;
  constant FSL_STAT_CONTROL_POS     : natural := 18;
  constant FSL_STAT_TEST_POS        : natural := 19;
  constant FSL_STAT_ATOMIC_POS      : natural := 20;
  constant FSL_STAT_EXCEPTION_POS   : natural := 21;
  
  constant FSL_DYN_OP_POS_TYPE      : natural := 21;
  constant FSL_DYN_BLOCK_POS_TYPE   : natural := 22;
  constant FSL_DYN_CONTROL_POS      : natural := 23;
  constant FSL_DYN_TEST_POS         : natural := 24;
  constant FSL_DYN_ATOMIC_POS       : natural := 25;
  constant FSL_DYN_EXCEPTION_POS    : natural := 26;
  
  constant FSL_DYN_BIT_POS_TYPE     : natural   := 2;
  constant FSL_DYN_BIT_DEC          : std_logic := '0';

  subtype  FSL_OP_POS_TYPE is natural range 16 to 17;
  constant FSL_OP_GET_DEC  : std_logic_vector(16 to 17) := "00";
  constant FSL_OP_PUT_DEC  : std_logic_vector(16 to 17) := "10";
  constant FSL_OP_NGET_DEC : std_logic_vector(16 to 17) := "01";
  constant FSL_OP_NPUT_DEC : std_logic_vector(16 to 17) := "11";

  -- Bit location within the instruction where the size of the load/store is
  -- determined 
  subtype  SIZE_POS_TYPE is natural range 4 to 5;
  constant BYTE_DEC    : std_logic_vector(0 to 1) := "00";
  constant DOUBLET_DEC : std_logic_vector(0 to 1) := "01";
  constant QUADLET_DEC : std_logic_vector(0 to 1) := "10";

  -- Bit location if the instruction is a store or a load
  constant STORE_POS : natural   := 3;
  constant LOAD_DEC  : std_logic := '0';
  constant STORE_DEC : std_logic := '1';

  -- IOPB bus exception POSITION
  constant IOPB_EXC_POS : natural   := 32;
  constant IOPB_EXC_DEC : std_logic := '1';

  -- PCMP decode for bits 0 to 3 of instr_OF
  subtype  PCMP_RES_POS_TYPE is natural range 29 to 31;
  subtype  PCMP_RES_TYPE is std_logic_vector(PCMP_RES_POS_TYPE);
  subtype  PCMP_DEC_TYPE is natural range 0 to 3;
  constant PCMP_DEC               : std_logic_vector(PCMP_DEC_TYPE) := "1000";
  -- Bit location of pcmp extra decode bit
  constant PCMP_EXTRA_POS         : natural                         := 21;
  constant PCMP_EXTRA_DEC         : std_logic                       := '1';
  -- Logic_Oper bits (Instr_OF(4 to 5))
  constant PCMPBF_DEC             : LOGIC_OP_TYPE                   := "00";
  constant PCMPEQ_DEC             : LOGIC_OP_TYPE                   := "10";
  constant PCMPNE_DEC             : LOGIC_OP_TYPE                   := "11";
  constant PCMPBF_NO_MATCH        : PCMP_RES_TYPE                   := "000";
  constant PCMPBF_B0_MATCH        : PCMP_RES_TYPE                   := "001";
  constant PCMPBF_B1_MATCH        : PCMP_RES_TYPE                   := "010";
  constant PCMPBF_B2_MATCH        : PCMP_RES_TYPE                   := "011";
  constant PCMPBF_B3_MATCH        : PCMP_RES_TYPE                   := "100";
  constant PCMPEQ_NO_MATCH        : PCMP_RES_TYPE                   := "000";
  constant PCMPEQ_MATCH           : PCMP_RES_TYPE                   := "001";
  constant PCMPNE_NO_MATCH        : PCMP_RES_TYPE                   := "000";
  constant PCMPNE_MATCH           : PCMP_RES_TYPE                   := "001";
  constant PCMP_LOGIC_DEC_BIT     : natural                         := 0;  -- 4
  constant PCMP_LOGIC_DEC_BYTEOPS : std_logic                       := '0';
  constant PCMP_LOGIC_DEC_EQNE    : std_logic                       := '1';
  constant PCMP_LOGIC_DEC2_BIT    : natural                         := 1;  -- 5
  constant PCMP_LOGIC_DEC2_PCMPBF : std_logic                       := '0';  -- Pattern Compare Byte Find
  constant PCMP_LOGIC_DEC2_PCMPBC : std_logic                       := '1';  -- Pattern Compare Byte Count
  constant PCMP_LOGIC_DEC2_PCMPEQ : std_logic                       := '0';  -- Pattern Compare Equal
  constant PCMP_LOGIC_DEC2_PCMPNE : std_logic                       := '1';  -- Pattern Compare Not Equal

  -- Exceptions
  -- Bit 27 is currently hardcoded to 0, except when MMU is used
  -- Bit 28 is currently being treated specially to decode common vs. uncommon
  --       Where only DB_EXCEPTION_KIND does not generate WB_Interrupt and all
  --       common exceptions add +4 for the return address
  subtype  EXCEPTION_KIND_TYPE is std_logic_vector(27 to 31);
  -- Common Exceptions
  constant FSL_CTRL_ERR_EXCEPTION_KIND    : EXCEPTION_KIND_TYPE := "00000";
  constant UNALIGNMENT_EXCEPTION_KIND     : EXCEPTION_KIND_TYPE := "00001";
  constant ILLEGAL_OPCODE_EXCEPTION_KIND  : EXCEPTION_KIND_TYPE := "00010";
  constant INSTRUCTION_BUS_EXCEPTION_KIND : EXCEPTION_KIND_TYPE := "00011";
  constant DATA_BUS_EXCEPTION_KIND        : EXCEPTION_KIND_TYPE := "00100";
  constant DIV_BY_ZERO_EXCEPTION_KIND     : EXCEPTION_KIND_TYPE := "00101";
  constant FPU_EXCEPTION_KIND             : EXCEPTION_KIND_TYPE := "00110";
  constant PRIV_INSTR_EXCEPTION_KIND      : EXCEPTION_KIND_TYPE := "00111";
  -- Uncommon Exceptions
  constant DBG_EXCEPTION_KIND             : EXCEPTION_KIND_TYPE := "01001";
  constant INTR_EXCEPTION_KIND            : EXCEPTION_KIND_TYPE := "01010";
  constant EXT_NM_BRK_EXCEPTION_KIND      : EXCEPTION_KIND_TYPE := "01011";
  constant EXT_BRK_EXCEPTION_KIND         : EXCEPTION_KIND_TYPE := "01100";
  -- MMU Common Exceptions
  constant DATA_STORAGE_EXCEPTION_KIND    : EXCEPTION_KIND_TYPE := "10000";
  constant INSTR_STORAGE_EXCEPTION_KIND   : EXCEPTION_KIND_TYPE := "10001";
  constant DATA_TLB_MISS_EXCEPTION_KIND   : EXCEPTION_KIND_TYPE := "10010";
  constant INSTR_TLB_MISS_EXCEPTION_KIND  : EXCEPTION_KIND_TYPE := "10011";

  constant EXCEPTION_KIND_COMMON_POS   : natural := 28;
  constant EXCEPTION_KIND_COMMON_DEC   : std_logic := '0';
  constant EXCEPTION_KIND_UNCOMMON_DEC : std_logic := '1';

  -- Prefetch buffer and history jumping types and constants
  subtype BUFFER_ADDR_TYPE is std_logic_vector(0 to 3);
  
  type OPCODE_MNEM_TYPE is (ADD, RSUB, ADDC, RSUBC, ADDK, RSUBK, ADDKC, RSUBKC,
                            ADDI, RSUBI, ADDIC, RSUBIC, ADDIK, RSUBIK, ADDIKC, RSUBIKC,
                            MUL, MULI,
                            or2, and2, xor2, ANDN, ORI, ANDI, XORI, ANDNI,
                            srl2, SRC, sra2, MTS, MFS, IMM, SEXT8, SEXT16,
                            BSLA, BSL, BSR, BSLAI, BSLI, BSRI,
                            BR, BRL, BRA, BRAL, BRD, BRLD, BRAD, BRALD,
                            BRI, BRLI, BRAI, BRALI, BRDI, BRLDI, BRADI, BRALDI,
                            BEQ, BNE, BLT, BLE, BGT, BGE,
                            BEQI, BNEI, BLTI, BLEI, BGTI, BGEI,
                            BEQD, BNED, BLTD, BLED, BGTD, BGED,
                            BEQID, BNEID, BLTID, BLEID, BGTID, BGEID,
                            RTSD, RTID,
                            LBU, SB, LHU, SH, LW, SW,
                            LBUI, SBI, LHUI, SHI, LWI, SWI, ILLEGAL);


  -- function Decode_Mnemomics ( Instr : INSTRUCTION_WORD_TYPE) return OPCODE_MNEM_TYPE;

  subtype REG_TYPE is natural range 0 to 31;

  type INSTR_REC_TYPE is
  record
    I   : OPCODE_MNEM_TYPE;
    Rd  : REG_TYPE;
    R1  : REG_TYPE;
    R2  : REG_TYPE;
    Imm : integer;
  end record INSTR_REC_TYPE;

  constant NULL_WORD : INSTRUCTION_WORD_TYPE := (others => '0');

  type MEM_ARRAY_TYPE is array(natural range <>) of INSTRUCTION_WORD_TYPE;

  -- moved from microblaze.vhd for GTi
  constant PC_START_ADDR  : DATA_TYPE := X"00000000";
  constant EXCEPTION_ADDR : DATA_TYPE := X"00000020";
  constant INTERRUPT_ADDR : DATA_TYPE := X"00000010";
  constant EXT_BRK_ADDR   : DATA_TYPE := X"00000018";


  -- Constant added for the Predecoding in Prefetch buffer
  constant IS_STORE_INSTR_POS : natural := 0;
  subtype  PreDecode_RD1_Addr is natural range 1 to 5;
  subtype  PreDecode_RD2_Addr is natural range 6 to 10;
  
end package MicroBlaze_ISA;