usb2_v.fit.smsg

来自「USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.」· SMSG 代码 · 共 7 行

Extra Info: Performing register packing on registers with non-logic cell location assignments
Extra Info: Completed register packing on registers with non-logic cell location assignments
Extra Info: Started Fast Input/Output/OE register processing
Extra Info: Finished Fast Input/Output/OE register processing
Extra Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density
Extra Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks