usb2_v.hif

USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.

Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
11
1012
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
usb2_test
# storage
db|USB2_V.(2).cnf
db|USB2_V.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
usb2_test.v
875d849ae7de3879493b49e629c117
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
usb2_test:inst1
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
USB2_V
# storage
db|USB2_V.(0).cnf
db|USB2_V.(0).cnf
# case_insensitive
# source_file
USB2_V.bdf
88b510e338a0ae27af6438afcc81da8e
25
# internal_option {
BLOCK_DESIGN_NAMING
AUTO
}
# hierarchies {
|
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
usb_port
# storage
db|USB2_V.(1).cnf
db|USB2_V.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
usb_port.v
6748a7af8da1acaf4bc14e4cc859ce
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
R1
000
PARAMETER_UNSIGNED_BIN
USR
R2
001
PARAMETER_UNSIGNED_BIN
USR
R3
011
PARAMETER_UNSIGNED_BIN
USR
W2
010
PARAMETER_UNSIGNED_BIN
USR
W3
110
PARAMETER_UNSIGNED_BIN
USR
W4
100
PARAMETER_UNSIGNED_BIN
USR
}
# hierarchies {
usb_port:inst
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete