usb2_v.map.qmsg

USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "slrd_n usb_port.v(87) " "Info (10041): Inferred latch for \"slrd_n\" at usb_port.v(87)" {  } { { "usb_port.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb_port.v" 87 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "sloe_n usb_port.v(87) " "Info (10041): Inferred latch for \"sloe_n\" at usb_port.v(87)" {  } { { "usb_port.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb_port.v" 87 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "usb2_test usb2_test:inst1 " "Info: Elaborating entity \"usb2_test\" for hierarchy \"usb2_test:inst1\"" {  } { { "USB2_V.bdf" "inst1" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 240 104 264 336 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "done_in_pre usb2_test.v(11) " "Warning (10036): Verilog HDL or VHDL warning at usb2_test.v(11): object \"done_in_pre\" assigned a value but never read" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 11 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "" 0}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "done_in_now usb2_test.v(12) " "Warning (10036): Verilog HDL or VHDL warning at usb2_test.v(12): object \"done_in_now\" assigned a value but never read" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 12 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|USB2_V\|usb2_test:inst1\|step 2 " "Info: State machine \"\|USB2_V\|usb2_test:inst1\|step\" contains 2 states" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|USB2_V\|usb2_test:inst1\|step " "Info: Selected Auto state machine encoding method for state machine \"\|USB2_V\|usb2_test:inst1\|step\"" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|USB2_V\|usb2_test:inst1\|step " "Info: Encoding result for state machine \"\|USB2_V\|usb2_test:inst1\|step\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "1 " "Info: Completed encoding using 1 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "usb2_test:inst1\|step.01 " "Info: Encoded state bit \"usb2_test:inst1\|step.01\"" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USB2_V\|usb2_test:inst1\|step.00 0 " "Info: State \"\|USB2_V\|usb2_test:inst1\|step.00\" uses code string \"0\"" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USB2_V\|usb2_test:inst1\|step.01 1 " "Info: State \"\|USB2_V\|usb2_test:inst1\|step.01\" uses code string \"1\"" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0}  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 17 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~0 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~0 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~1 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~1 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~2 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~2 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~3 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~3 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~4 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~4 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~5 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~5 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~6 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~6 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~7 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~7 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~8 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~8 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~9 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~9 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~10 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~10 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~11 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~11 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~12 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~12 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~13 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~13 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~14 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~14 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "fd~15 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus fd~15 that it feeds" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 73 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 16 -1 0 } } { "usb2_test.v" "" { Text "E:/wt/workspace/mywork/USB2_V/usb2_test.v" 10 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Info" "IOPT_MLS_DEV_CLRN_SETS_REGISTERS" "" "Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" {  } {  } 0 0 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "" 0}
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "fd~16 " "Warning: Node \"fd~16\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~17 " "Warning: Node \"fd~17\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~18 " "Warning: Node \"fd~18\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~19 " "Warning: Node \"fd~19\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~20 " "Warning: Node \"fd~20\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~21 " "Warning: Node \"fd~21\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~22 " "Warning: Node \"fd~22\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~23 " "Warning: Node \"fd~23\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~24 " "Warning: Node \"fd~24\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~25 " "Warning: Node \"fd~25\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~26 " "Warning: Node \"fd~26\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~27 " "Warning: Node \"fd~27\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~28 " "Warning: Node \"fd~28\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~29 " "Warning: Node \"fd~29\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~30 " "Warning: Node \"fd~30\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "fd~31 " "Warning: Node \"fd~31\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 248 568 744 264 "fd\[15..0\]" "" } } } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "sloe VCC " "Warning (13410): Pin \"sloe\" stuck at VCC" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 280 568 744 296 "sloe" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "slrd VCC " "Warning (13410): Pin \"slrd\" stuck at VCC" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 296 568 744 312 "slrd" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "PKTEND VCC " "Warning (13410): Pin \"PKTEND\" stuck at VCC" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 520 328 504 536 "PKTEND" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "fifoadr\[1\] VCC " "Warning (13410): Pin \"fifoadr\[1\]\" stuck at VCC" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 216 656 832 232 "fifoadr\[1..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "fifoadr\[0\] VCC " "Warning (13410): Pin \"fifoadr\[0\]\" stuck at VCC" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 216 656 832 232 "fifoadr\[1..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 1 " "Info: 1 registers lost all their fanouts during netlist optimizations. The first 1 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "usb2_test:inst1\|step~8 " "Info: Register \"usb2_test:inst1\|step~8\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Warning: Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "fifo_full " "Warning (15610): No output dependent on input pin \"fifo_full\"" {  } { { "USB2_V.bdf" "" { Schematic "E:/wt/workspace/mywork/USB2_V/USB2_V.bdf" { { 336 80 248 352 "fifo_full" "" } } } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "66 " "Info: Implemented 66 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "6 " "Info: Implemented 6 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_BIDIRS" "16 " "Info: Implemented 16 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "41 " "Info: Implemented 41 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 51 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 51 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "144 " "Info: Allocated 144 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon May 18 11:47:34 2009 " "Info: Processing ended: Mon May 18 11:47:34 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}