usb2_v.fit.summary

USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.

Fitter Status : Successful - Mon May 18 11:47:42 2009
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Full Version
Revision Name : USB2_V
Top-level Entity Name : USB2_V
Family : Cyclone II
Device : EP2C35F484C8
Timing Models : Final
Total logic elements : 41 / 33,216 ( < 1 % )
    Total combinational functions : 41 / 33,216 ( < 1 % )
    Dedicated logic registers : 35 / 33,216 ( < 1 % )
Total registers : 35
Total pins : 25 / 322 ( 8 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )