jtag.qsf

altera usb下载线原理图和cpld程序

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		JTAG_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		JTAG_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name DEVICE EPM240T100C5
set_global_assignment -name TOP_LEVEL_ENTITY JTAG
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:10:51  JULY 13, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 9.0
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_53 -to nWR
set_location_assignment PIN_52 -to nRD
set_location_assignment PIN_54 -to nTXE
set_location_assignment PIN_55 -to nRXF
set_location_assignment PIN_5 -to TDI9
set_location_assignment PIN_4 -to TMS5
set_location_assignment PIN_3 -to TDO3
set_location_assignment PIN_2 -to TCK1
set_location_assignment PIN_75 -to FD[0]
set_location_assignment PIN_74 -to FD[1]
set_location_assignment PIN_73 -to FD[2]
set_location_assignment PIN_72 -to FD[3]
set_location_assignment PIN_71 -to FD[4]
set_location_assignment PIN_70 -to FD[5]
set_location_assignment PIN_69 -to FD[6]
set_location_assignment PIN_68 -to FD[7]
set_global_assignment -name WEAK_PULL_UP_RESISTOR ON
set_global_assignment -name BDF_FILE JTAG.bdf
set_global_assignment -name VHDL_FILE jtag_logic.vhd
set_location_assignment PIN_12 -to CLK12MHz