usb2_v.qsf

USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.

# Copyright (C) 1991-2008 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		USB2_V_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F484C8
set_global_assignment -name TOP_LEVEL_ENTITY USB2_V
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "8.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:27:06  JANUARY 06, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name BDF_FILE USB2_V.bdf
set_global_assignment -name VERILOG_FILE usb_port.v
set_global_assignment -name VERILOG_FILE usb2_test.v
set_global_assignment -name TCL_SCRIPT_FILE setup.tcl
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF
set_location_assignment PIN_L1 -to clk
set_location_assignment PIN_U12 -to reset
set_location_assignment PIN_R14 -to FD[0]
set_location_assignment PIN_T16 -to FD[1]
set_location_assignment PIN_R16 -to FD[2]
set_location_assignment PIN_W20 -to FD[3]
set_location_assignment PIN_J19 -to FD[4]
set_location_assignment PIN_J20 -to FD[5]
set_location_assignment PIN_H15 -to FD[6]
set_location_assignment PIN_H17 -to FD[7]
set_location_assignment PIN_D20 -to FD[8]
set_location_assignment PIN_E19 -to FD[9]
set_location_assignment PIN_E20 -to FD[10]
set_location_assignment PIN_F20 -to FD[11]
set_location_assignment PIN_G17 -to FD[12]
set_location_assignment PIN_J15 -to FD[13]
set_location_assignment PIN_J17 -to FD[14]
set_location_assignment PIN_N15 -to FD[15]
set_location_assignment PIN_G16 -to fifoadr[0]
set_location_assignment PIN_C17 -to fifoadr[1]
set_location_assignment PIN_J18 -to slwr
set_location_assignment PIN_P15 -to slrd
set_location_assignment PIN_F13 -to sloe
set_location_assignment PIN_E2 -to fifo_empty
set_location_assignment PIN_F11 -to fifo_full
set_location_assignment PIN_C18 -to PKTEND
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS16
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_location_assignment PIN_R7 -to SPI_MOSI
set_location_assignment PIN_T7 -to SPI_SCLK
set_location_assignment PIN_U9 -to SPI_SSn
set_location_assignment PIN_E9 -to DA_CLK
set_location_assignment PIN_D1 -to DA_SLEEP
set_location_assignment PIN_E2 -to DA_DATA[0]
set_location_assignment PIN_F1 -to DA_DATA[1]
set_location_assignment PIN_F2 -to DA_DATA[2]
set_location_assignment PIN_J3 -to DA_DATA[3]
set_location_assignment PIN_H1 -to DA_DATA[4]
set_location_assignment PIN_H2 -to DA_DATA[5]
set_location_assignment PIN_J1 -to DA_DATA[6]
set_location_assignment PIN_J2 -to DA_DATA[7]
set_location_assignment PIN_N2 -to DA_DATA[8]
set_location_assignment PIN_N1 -to DA_DATA[9]
set_location_assignment PIN_P2 -to DA_DATA[10]
set_location_assignment PIN_P1 -to DA_DATA[11]
set_location_assignment PIN_R2 -to DA_DATA[12]
set_location_assignment PIN_R1 -to DA_DATA[13]
set_location_assignment PIN_W5 -to AD_CLK
set_location_assignment PIN_T1 -to AD_OTR
set_location_assignment PIN_T2 -to AD_DATA[11]
set_location_assignment PIN_U1 -to AD_DATA[10]
set_location_assignment PIN_U2 -to AD_DATA[9]
set_location_assignment PIN_V1 -to AD_DATA[8]
set_location_assignment PIN_V2 -to AD_DATA[7]
set_location_assignment PIN_W1 -to AD_DATA[6]
set_location_assignment PIN_W2 -to AD_DATA[5]
set_location_assignment PIN_Y1 -to AD_DATA[4]
set_location_assignment PIN_Y2 -to AD_DATA[3]
set_location_assignment PIN_Y3 -to AD_DATA[2]
set_location_assignment PIN_W4 -to AD_DATA[1]
set_location_assignment PIN_Y4 -to AD_DATA[0]
set_location_assignment PIN_B16 -to SRAMB_CE
set_location_assignment PIN_K21 -to SRAMA_CE
set_location_assignment PIN_M19 -to SRAM_OE
set_location_assignment PIN_V22 -to SRAM_WE
set_location_assignment PIN_P18 -to SRAMBY_LU[0]
set_location_assignment PIN_M18 -to SRAMBY_LU[1]
set_location_assignment PIN_C20 -to SRAMBY_LU[2]
set_location_assignment PIN_C19 -to SRAMBY_LU[3]
set_location_assignment PIN_G22 -to SRAM_ADDR[0]
set_location_assignment PIN_G21 -to SRAM_ADDR[1]
set_location_assignment PIN_J22 -to SRAM_ADDR[2]
set_location_assignment PIN_J21 -to SRAM_ADDR[3]
set_location_assignment PIN_K22 -to SRAM_ADDR[4]
set_location_assignment PIN_V21 -to SRAM_ADDR[5]
set_location_assignment PIN_W22 -to SRAM_ADDR[6]
set_location_assignment PIN_W21 -to SRAM_ADDR[7]
set_location_assignment PIN_Y22 -to SRAM_ADDR[8]
set_location_assignment PIN_Y21 -to SRAM_ADDR[9]
set_location_assignment PIN_Y18 -to SRAM_ADDR[10]
set_location_assignment PIN_Y19 -to SRAM_ADDR[11]
set_location_assignment PIN_Y20 -to SRAM_ADDR[12]
set_location_assignment PIN_Y17 -to SRAM_ADDR[13]
set_location_assignment PIN_V15 -to SRAM_ADDR[14]
set_location_assignment PIN_L18 -to SRAM_ADDR[15]
set_location_assignment PIN_L19 -to SRAM_ADDR[16]
set_location_assignment PIN_K20 -to SRAM_ADDR[17]
set_location_assignment PIN_N22 -to SRAM_DQ[0]
set_location_assignment PIN_N21 -to SRAM_DQ[1]
set_location_assignment PIN_R22 -to SRAM_DQ[2]
set_location_assignment PIN_R21 -to SRAM_DQ[3]
set_location_assignment PIN_T22 -to SRAM_DQ[4]
set_location_assignment PIN_T21 -to SRAM_DQ[5]
set_location_assignment PIN_U22 -to SRAM_DQ[6]
set_location_assignment PIN_U21 -to SRAM_DQ[7]
set_location_assignment PIN_U19 -to SRAM_DQ[8]
set_location_assignment PIN_U20 -to SRAM_DQ[9]
set_location_assignment PIN_T18 -to SRAM_DQ[10]
set_location_assignment PIN_R18 -to SRAM_DQ[11]
set_location_assignment PIN_R19 -to SRAM_DQ[12]
set_location_assignment PIN_R20 -to SRAM_DQ[13]
set_location_assignment PIN_R17 -to SRAM_DQ[14]
set_location_assignment PIN_P17 -to SRAM_DQ[15]
set_location_assignment PIN_A17 -to SRAM_DQ[16]
set_location_assignment PIN_B17 -to SRAM_DQ[17]
set_location_assignment PIN_A18 -to SRAM_DQ[18]
set_location_assignment PIN_B18 -to SRAM_DQ[19]
set_location_assignment PIN_A19 -to SRAM_DQ[20]
set_location_assignment PIN_B19 -to SRAM_DQ[21]
set_location_assignment PIN_A20 -to SRAM_DQ[22]
set_location_assignment PIN_B20 -to SRAM_DQ[23]
set_location_assignment PIN_F21 -to SRAM_DQ[24]
set_location_assignment PIN_F22 -to SRAM_DQ[25]
set_location_assignment PIN_E21 -to SRAM_DQ[26]
set_location_assignment PIN_E22 -to SRAM_DQ[27]
set_location_assignment PIN_D21 -to SRAM_DQ[28]
set_location_assignment PIN_D22 -to SRAM_DQ[29]
set_location_assignment PIN_C21 -to SRAM_DQ[30]
set_location_assignment PIN_C22 -to SRAM_DQ[31]
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 14622752 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top