floorled.vhd.bak

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LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY floorled IS
PORT
(	clk : IN STD_LOGIC;
	position :IN STD_LOGIC_vector(2 downto 0);
	posled : out STD_LOGIC_vector(7 downto 0)
);
	
END floorled;
ARCHITECTURE behave OF floorled IS

begin
PROCESS(clk)
BEGIN
	IF clk 'EVENT AND clk = '1' THEN
		CASE position IS
			WHEN "001" => posled <= "01100000";
			WHEN "010" => posled <= "11011010";
			WHEN "011" => posled <= "11110010";
			WHEN "100" => posled <= "01100110";
			WHEN "101" => posled <= "10110110";
			WHEN "110" => posled <= "10111110";
			when others=>null;
		END CASE;
	END IF;
END PROCESS ;	
END behave;