elevator.hier_info

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|elevator
doorlight <= elerun:inst3.doorlight
clk => clkdiv:inst1.clk
alarm => elerun:inst3.alarm
reset => elerun:inst3.reset
reset => keypro:inst.reset
yanshi => elerun:inst3.yanshi
tiqian => elerun:inst3.tiqian
FDN[2] => keypro:inst.fdn[2]
FDN[3] => keypro:inst.fdn[3]
FDN[4] => keypro:inst.fdn[4]
FDN[5] => keypro:inst.fdn[5]
FDN[6] => keypro:inst.fdn[6]
FUP[1] => keypro:inst.fup[1]
FUP[2] => keypro:inst.fup[2]
FUP[3] => keypro:inst.fup[3]
FUP[4] => keypro:inst.fup[4]
FUP[5] => keypro:inst.fup[5]
ST[1] => keypro:inst.st[1]
ST[2] => keypro:inst.st[2]
ST[3] => keypro:inst.st[3]
ST[4] => keypro:inst.st[4]
ST[5] => keypro:inst.st[5]
ST[6] => keypro:inst.st[6]
posled[0] <= floorled:inst2.posled[0]
posled[1] <= floorled:inst2.posled[1]
posled[2] <= floorled:inst2.posled[2]
posled[3] <= floorled:inst2.posled[3]
posled[4] <= floorled:inst2.posled[4]
posled[5] <= floorled:inst2.posled[5]
posled[6] <= floorled:inst2.posled[6]
posled[7] <= floorled:inst2.posled[7]
udsig[0] <= elerun:inst3.udsig[0]
udsig[1] <= elerun:inst3.udsig[1]
udsig[2] <= elerun:inst3.udsig[2]
udsig[3] <= elerun:inst3.udsig[3]
udsig[4] <= elerun:inst3.udsig[4]
udsig[5] <= elerun:inst3.udsig[5]
udsig[6] <= elerun:inst3.udsig[6]
udsig[7] <= elerun:inst3.udsig[7]


|elevator|elerun:inst3
clk => clearup~reg0.CLK
clk => cleardn~reg0.CLK
clk => doorlight~reg0.CLK
clk => posreg[2].CLK
clk => posreg[1].CLK
clk => posreg[0].CLK
clk => udsig[7]~reg0.CLK
clk => udsig[6]~reg0.CLK
clk => udsig[5]~reg0.CLK
clk => udsig[4]~reg0.CLK
clk => udsig[3]~reg0.CLK
clk => udsig[2]~reg0.CLK
clk => udsig[1]~reg0.CLK
clk => udsig[0]~reg0.CLK
clk => udflag.CLK
clk => one[6].CLK
clk => one[5].CLK
clk => one[4].CLK
clk => one[3].CLK
clk => one[2].CLK
clk => one[1].CLK
clk => mylift~69.IN1
alarm => process0~0.IN0
reset => process0~0.IN1
fuplight[1] => LessThan8.IN12
fuplight[1] => Equal1.IN11
fuplight[1] => Mux1.IN7
fuplight[1] => LessThan5.IN6
fuplight[1] => LessThan2.IN7
fuplight[2] => LessThan8.IN11
fuplight[2] => Equal1.IN10
fuplight[2] => Mux1.IN6
fuplight[2] => LessThan5.IN5
fuplight[2] => LessThan2.IN6
fuplight[3] => LessThan8.IN10
fuplight[3] => Equal1.IN9
fuplight[3] => Mux1.IN5
fuplight[3] => LessThan5.IN4
fuplight[3] => LessThan2.IN5
fuplight[4] => LessThan8.IN9
fuplight[4] => Equal1.IN8
fuplight[4] => Mux1.IN4
fuplight[4] => LessThan5.IN3
fuplight[4] => LessThan2.IN4
fuplight[5] => LessThan8.IN8
fuplight[5] => Equal1.IN7
fuplight[5] => Mux1.IN3
fuplight[5] => LessThan5.IN2
fuplight[5] => LessThan2.IN3
fuplight[6] => LessThan8.IN7
fuplight[6] => Equal1.IN6
fuplight[6] => Mux1.IN2
fuplight[6] => LessThan2.IN2
fdnlight[1] => Equal3.IN11
fdnlight[1] => LessThan7.IN12
fdnlight[1] => Mux2.IN7
fdnlight[1] => LessThan6.IN6
fdnlight[1] => LessThan3.IN7
fdnlight[2] => Equal3.IN10
fdnlight[2] => LessThan7.IN11
fdnlight[2] => Mux2.IN6
fdnlight[2] => LessThan6.IN5
fdnlight[2] => LessThan3.IN6
fdnlight[3] => Equal3.IN9
fdnlight[3] => LessThan7.IN10
fdnlight[3] => Mux2.IN5
fdnlight[3] => LessThan6.IN4
fdnlight[3] => LessThan3.IN5
fdnlight[4] => Equal3.IN8
fdnlight[4] => LessThan7.IN9
fdnlight[4] => Mux2.IN4
fdnlight[4] => LessThan6.IN3
fdnlight[4] => LessThan3.IN4
fdnlight[5] => Equal3.IN7
fdnlight[5] => LessThan7.IN8
fdnlight[5] => Mux2.IN3
fdnlight[5] => LessThan6.IN2
fdnlight[5] => LessThan3.IN3
fdnlight[6] => Equal3.IN6
fdnlight[6] => LessThan7.IN7
fdnlight[6] => Mux2.IN2
fdnlight[6] => LessThan3.IN2
stlight[1] => Mux0.IN7
stlight[1] => Equal0.IN11
stlight[1] => LessThan4.IN6
stlight[1] => LessThan1.IN7
stlight[1] => LessThan0.IN12
stlight[2] => Mux0.IN6
stlight[2] => Equal0.IN10
stlight[2] => LessThan4.IN5
stlight[2] => LessThan1.IN6
stlight[2] => LessThan0.IN11
stlight[3] => Mux0.IN5
stlight[3] => Equal0.IN9
stlight[3] => LessThan4.IN4
stlight[3] => LessThan1.IN5
stlight[3] => LessThan0.IN10
stlight[4] => Mux0.IN4
stlight[4] => Equal0.IN8
stlight[4] => LessThan4.IN3
stlight[4] => LessThan1.IN4
stlight[4] => LessThan0.IN9
stlight[5] => Mux0.IN3
stlight[5] => Equal0.IN7
stlight[5] => LessThan4.IN2
stlight[5] => LessThan1.IN3
stlight[5] => LessThan0.IN8
stlight[6] => Mux0.IN2
stlight[6] => Equal0.IN6
stlight[6] => LessThan1.IN2
stlight[6] => LessThan0.IN7
position[0] <= posreg[0].DB_MAX_OUTPUT_PORT_TYPE
position[1] <= posreg[1].DB_MAX_OUTPUT_PORT_TYPE
position[2] <= posreg[2].DB_MAX_OUTPUT_PORT_TYPE
doorlight <= doorlight~reg0.DB_MAX_OUTPUT_PORT_TYPE
clearup <= clearup~reg0.DB_MAX_OUTPUT_PORT_TYPE
cleardn <= cleardn~reg0.DB_MAX_OUTPUT_PORT_TYPE
yanshi => mylift~0.DATAA
yanshi => mylift~1.DATAA
tiqian => Selector5.IN4
tiqian => Selector5.IN5
tiqian => Selector5.IN6
tiqian => Selector5.IN7
tiqian => Selector5.IN8
tiqian => mylift~1.OUTPUTSELECT
tiqian => mylift~0.OUTPUTSELECT
udsig[0] <= udsig[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[1] <= udsig[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[2] <= udsig[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[3] <= udsig[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[4] <= udsig[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[5] <= udsig[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[6] <= udsig[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
udsig[7] <= udsig[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|elevator|clkdiv:inst1
clk => cnt[7].CLK
clk => cnt[6].CLK
clk => cnt[5].CLK
clk => cnt[4].CLK
clk => cnt[3].CLK
clk => cnt[2].CLK
clk => cnt[1].CLK
clk => cnt[0].CLK
clk => clk_8hz~reg0.CLK
clk => clk_2hz~reg0.CLK
clk_2hz <= clk_2hz~reg0.DB_MAX_OUTPUT_PORT_TYPE
clk_8hz <= clk_8hz~reg0.DB_MAX_OUTPUT_PORT_TYPE


|elevator|keypro:inst
clk => stlight[6]~reg0.CLK
clk => stlight[5]~reg0.CLK
clk => stlight[4]~reg0.CLK
clk => stlight[3]~reg0.CLK
clk => stlight[2]~reg0.CLK
clk => stlight[1]~reg0.CLK
clk => fuplight[6]~reg0.CLK
clk => fuplight[5]~reg0.CLK
clk => fuplight[4]~reg0.CLK
clk => fuplight[3]~reg0.CLK
clk => fuplight[2]~reg0.CLK
clk => fuplight[1]~reg0.CLK
clk => fdnlight[6]~reg0.CLK
clk => fdnlight[5]~reg0.CLK
clk => fdnlight[4]~reg0.CLK
clk => fdnlight[3]~reg0.CLK
clk => fdnlight[2]~reg0.CLK
clk => fdnlight[1]~reg0.CLK
reset => stlight[6]~reg0.ACLR
reset => stlight[5]~reg0.ACLR
reset => stlight[4]~reg0.ACLR
reset => stlight[3]~reg0.ACLR
reset => stlight[2]~reg0.ACLR
reset => stlight[1]~reg0.ACLR
reset => fuplight[6]~reg0.ACLR
reset => fuplight[5]~reg0.ACLR
reset => fuplight[4]~reg0.ACLR
reset => fuplight[3]~reg0.ACLR
reset => fuplight[2]~reg0.ACLR
reset => fuplight[1]~reg0.ACLR
reset => fdnlight[6]~reg0.ACLR
reset => fdnlight[5]~reg0.ACLR
reset => fdnlight[4]~reg0.ACLR
reset => fdnlight[3]~reg0.ACLR
reset => fdnlight[2]~reg0.ACLR
reset => fdnlight[1]~reg0.ACLR
fup[1] => fuplight~10.DATAA
fup[2] => fuplight~9.DATAA
fup[3] => fuplight~8.DATAA
fup[4] => fuplight~7.DATAA
fup[5] => fuplight~6.DATAA
fdn[2] => fdnlight~11.DATAA
fdn[3] => fdnlight~10.DATAA
fdn[4] => fdnlight~9.DATAA
fdn[5] => fdnlight~8.DATAA
fdn[6] => fdnlight~7.DATAA
fuplight[1] <= fuplight[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fuplight[2] <= fuplight[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fuplight[3] <= fuplight[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fuplight[4] <= fuplight[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fuplight[5] <= fuplight[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fuplight[6] <= fuplight[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[1] <= fdnlight[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[2] <= fdnlight[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[3] <= fdnlight[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[4] <= fdnlight[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[5] <= fdnlight[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
fdnlight[6] <= fdnlight[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
st[1] => stlight~11.DATAA
st[1] => stlight~23.DATAA
st[2] => stlight~10.DATAA
st[2] => stlight~22.DATAA
st[3] => stlight~9.DATAA
st[3] => stlight~21.DATAA
st[4] => stlight~8.DATAA
st[4] => stlight~20.DATAA
st[5] => stlight~7.DATAA
st[5] => stlight~19.DATAA
st[6] => stlight~6.DATAA
st[6] => stlight~18.DATAA
stlight[1] <= stlight[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
stlight[2] <= stlight[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
stlight[3] <= stlight[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
stlight[4] <= stlight[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
stlight[5] <= stlight[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
stlight[6] <= stlight[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
position[0] => Decoder0.IN2
position[1] => Decoder0.IN1
position[2] => Decoder0.IN0
clearup => fuplight~11.OUTPUTSELECT
clearup => fuplight~10.OUTPUTSELECT
clearup => fuplight~9.OUTPUTSELECT
clearup => fuplight~8.OUTPUTSELECT
clearup => fuplight~7.OUTPUTSELECT
clearup => fuplight~6.OUTPUTSELECT
clearup => stlight~11.OUTPUTSELECT
clearup => stlight~10.OUTPUTSELECT
clearup => stlight~9.OUTPUTSELECT
clearup => stlight~8.OUTPUTSELECT
clearup => stlight~7.OUTPUTSELECT
clearup => stlight~6.OUTPUTSELECT
cleardn => fdnlight~11.OUTPUTSELECT
cleardn => fdnlight~10.OUTPUTSELECT
cleardn => fdnlight~9.OUTPUTSELECT
cleardn => fdnlight~8.OUTPUTSELECT
cleardn => fdnlight~7.OUTPUTSELECT
cleardn => fdnlight~6.OUTPUTSELECT
cleardn => stlight~23.OUTPUTSELECT
cleardn => stlight~22.OUTPUTSELECT
cleardn => stlight~21.OUTPUTSELECT
cleardn => stlight~20.OUTPUTSELECT
cleardn => stlight~19.OUTPUTSELECT
cleardn => stlight~18.OUTPUTSELECT


|elevator|floorled:inst2
clk => posled[7]~reg0.CLK
clk => posled[6]~reg0.CLK
clk => posled[5]~reg0.CLK
clk => posled[4]~reg0.CLK
clk => posled[3]~reg0.CLK
clk => posled[2]~reg0.CLK
clk => posled[1]~reg0.CLK
clk => posled[0]~reg0.CLK
position[0] => Mux5.IN10
position[0] => Mux4.IN10
position[0] => Mux3.IN5
position[0] => Mux2.IN10
position[0] => Mux1.IN10
position[0] => Mux0.IN10
position[1] => Mux5.IN9
position[1] => Mux4.IN9
position[1] => Mux3.IN4
position[1] => Mux2.IN9
position[1] => Mux1.IN9
position[1] => Mux0.IN9
position[2] => Mux5.IN8
position[2] => Mux4.IN8
position[2] => Mux2.IN8
position[2] => Mux1.IN8
position[2] => Mux0.IN8
posled[0] <= posled[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[1] <= posled[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[2] <= posled[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[3] <= posled[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[4] <= posled[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[5] <= posled[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[6] <= posled[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
posled[7] <= posled[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE