prev_cmp_elevator.tan.qmsg

来自「六层电梯控制vhdl六层电梯控制vhdl六层电梯控制vhdl六层电梯控制vhdl」· QMSG 代码 · 共 11 行 · 第 1/3 页

QMSG
11
字号
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "2 " "Warning: Found 2 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "clkdiv:inst1\|clk_8hz " "Info: Detected ripple clock \"clkdiv:inst1\|clk_8hz\" as buffer" {  } { { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 10 -1 0 } } { "d:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "clkdiv:inst1\|clk_8hz" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0} { "Info" "ITAN_RIPPLE_CLK" "clkdiv:inst1\|clk_2hz " "Info: Detected ripple clock \"clkdiv:inst1\|clk_2hz\" as buffer" {  } { { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 9 -1 0 } } { "d:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "d:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "clkdiv:inst1\|clk_2hz" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register keypro:inst\|fdnlight\[5\] register elerun:inst3\|udsig\[1\] 99.52 MHz 10.048 ns Internal " "Info: Clock \"clk\" has Internal fmax of 99.52 MHz between source register \"keypro:inst\|fdnlight\[5\]\" and destination register \"elerun:inst3\|udsig\[1\]\" (period= 10.048 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.786 ns + Longest register register " "Info: + Longest register to register delay is 9.786 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns keypro:inst\|fdnlight\[5\] 1 REG LC_X23_Y6_N3 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X23_Y6_N3; Fanout = 6; REG Node = 'keypro:inst\|fdnlight\[5\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { keypro:inst|fdnlight[5] } "NODE_NAME" } } { "keypro.vhd" "" { Text "E:/project/elevator/keypro.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.251 ns) + CELL(0.590 ns) 1.841 ns elerun:inst3\|LessThan6~259 2 COMB LC_X23_Y6_N4 1 " "Info: 2: + IC(1.251 ns) + CELL(0.590 ns) = 1.841 ns; Loc. = LC_X23_Y6_N4; Fanout = 1; COMB Node = 'elerun:inst3\|LessThan6~259'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.841 ns" { keypro:inst|fdnlight[5] elerun:inst3|LessThan6~259 } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1547 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.130 ns) + CELL(0.590 ns) 3.561 ns elerun:inst3\|LessThan6~261 3 COMB LC_X25_Y6_N7 1 " "Info: 3: + IC(1.130 ns) + CELL(0.590 ns) = 3.561 ns; Loc. = LC_X25_Y6_N7; Fanout = 1; COMB Node = 'elerun:inst3\|LessThan6~261'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.720 ns" { elerun:inst3|LessThan6~259 elerun:inst3|LessThan6~261 } "NODE_NAME" } } { "d:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1547 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.449 ns) + CELL(0.292 ns) 4.302 ns elerun:inst3\|process0~954 4 COMB LC_X25_Y6_N2 1 " "Info: 4: + IC(0.449 ns) + CELL(0.292 ns) = 4.302 ns; Loc. = LC_X25_Y6_N2; Fanout = 1; COMB Node = 'elerun:inst3\|process0~954'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.741 ns" { elerun:inst3|LessThan6~261 elerun:inst3|process0~954 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.716 ns) + CELL(0.114 ns) 5.132 ns elerun:inst3\|process0~963 5 COMB LC_X26_Y6_N3 3 " "Info: 5: + IC(0.716 ns) + CELL(0.114 ns) = 5.132 ns; Loc. = LC_X26_Y6_N3; Fanout = 3; COMB Node = 'elerun:inst3\|process0~963'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.830 ns" { elerun:inst3|process0~954 elerun:inst3|process0~963 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.590 ns) + CELL(0.114 ns) 6.836 ns elerun:inst3\|Selector5~187 6 COMB LC_X24_Y7_N1 2 " "Info: 6: + IC(1.590 ns) + CELL(0.114 ns) = 6.836 ns; Loc. = LC_X24_Y7_N1; Fanout = 2; COMB Node = 'elerun:inst3\|Selector5~187'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.704 ns" { elerun:inst3|process0~963 elerun:inst3|Selector5~187 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 51 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.433 ns) + CELL(0.114 ns) 7.383 ns elerun:inst3\|udsig\[2\]~1014 7 COMB LC_X24_Y7_N7 1 " "Info: 7: + IC(0.433 ns) + CELL(0.114 ns) = 7.383 ns; Loc. = LC_X24_Y7_N7; Fanout = 1; COMB Node = 'elerun:inst3\|udsig\[2\]~1014'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.547 ns" { elerun:inst3|Selector5~187 elerun:inst3|udsig[2]~1014 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.448 ns) + CELL(0.292 ns) 8.123 ns elerun:inst3\|udsig\[2\]~1016 8 COMB LC_X24_Y7_N3 2 " "Info: 8: + IC(0.448 ns) + CELL(0.292 ns) = 8.123 ns; Loc. = LC_X24_Y7_N3; Fanout = 2; COMB Node = 'elerun:inst3\|udsig\[2\]~1016'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.740 ns" { elerun:inst3|udsig[2]~1014 elerun:inst3|udsig[2]~1016 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.796 ns) + CELL(0.867 ns) 9.786 ns elerun:inst3\|udsig\[1\] 9 REG LC_X25_Y7_N4 1 " "Info: 9: + IC(0.796 ns) + CELL(0.867 ns) = 9.786 ns; Loc. = LC_X25_Y7_N4; Fanout = 1; REG Node = 'elerun:inst3\|udsig\[1\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.663 ns" { elerun:inst3|udsig[2]~1016 elerun:inst3|udsig[1] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.973 ns ( 30.38 % ) " "Info: Total cell delay = 2.973 ns ( 30.38 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.813 ns ( 69.62 % ) " "Info: Total interconnect delay = 6.813 ns ( 69.62 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "9.786 ns" { keypro:inst|fdnlight[5] elerun:inst3|LessThan6~259 elerun:inst3|LessThan6~261 elerun:inst3|process0~954 elerun:inst3|process0~963 elerun:inst3|Selector5~187 elerun:inst3|udsig[2]~1014 elerun:inst3|udsig[2]~1016 elerun:inst3|udsig[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "9.786 ns" { keypro:inst|fdnlight[5] {} elerun:inst3|LessThan6~259 {} elerun:inst3|LessThan6~261 {} elerun:inst3|process0~954 {} elerun:inst3|process0~963 {} elerun:inst3|Selector5~187 {} elerun:inst3|udsig[2]~1014 {} elerun:inst3|udsig[2]~1016 {} elerun:inst3|udsig[1] {} } { 0.000ns 1.251ns 1.130ns 0.449ns 0.716ns 1.590ns 0.433ns 0.448ns 0.796ns } { 0.000ns 0.590ns 0.590ns 0.292ns 0.114ns 0.114ns 0.114ns 0.292ns 0.867ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.001 ns - Smallest " "Info: - Smallest clock skew is -0.001 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 7.573 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 7.573 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_17 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 7; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 192 64 232 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.935 ns) 2.964 ns clkdiv:inst1\|clk_2hz 2 REG LC_X11_Y6_N5 34 " "Info: 2: + IC(0.560 ns) + CELL(0.935 ns) = 2.964 ns; Loc. = LC_X11_Y6_N5; Fanout = 34; REG Node = 'clkdiv:inst1\|clk_2hz'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.495 ns" { clk clkdiv:inst1|clk_2hz } "NODE_NAME" } } { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.898 ns) + CELL(0.711 ns) 7.573 ns elerun:inst3\|udsig\[1\] 3 REG LC_X25_Y7_N4 1 " "Info: 3: + IC(3.898 ns) + CELL(0.711 ns) = 7.573 ns; Loc. = LC_X25_Y7_N4; Fanout = 1; REG Node = 'elerun:inst3\|udsig\[1\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.609 ns" { clkdiv:inst1|clk_2hz elerun:inst3|udsig[1] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 41.13 % ) " "Info: Total cell delay = 3.115 ns ( 41.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.458 ns ( 58.87 % ) " "Info: Total interconnect delay = 4.458 ns ( 58.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[1] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 7.574 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 7.574 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_17 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 7; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 192 64 232 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.935 ns) 2.964 ns clkdiv:inst1\|clk_8hz 2 REG LC_X11_Y6_N2 16 " "Info: 2: + IC(0.560 ns) + CELL(0.935 ns) = 2.964 ns; Loc. = LC_X11_Y6_N2; Fanout = 16; REG Node = 'clkdiv:inst1\|clk_8hz'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.495 ns" { clk clkdiv:inst1|clk_8hz } "NODE_NAME" } } { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.899 ns) + CELL(0.711 ns) 7.574 ns keypro:inst\|fdnlight\[5\] 3 REG LC_X23_Y6_N3 6 " "Info: 3: + IC(3.899 ns) + CELL(0.711 ns) = 7.574 ns; Loc. = LC_X23_Y6_N3; Fanout = 6; REG Node = 'keypro:inst\|fdnlight\[5\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.610 ns" { clkdiv:inst1|clk_8hz keypro:inst|fdnlight[5] } "NODE_NAME" } } { "keypro.vhd" "" { Text "E:/project/elevator/keypro.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 41.13 % ) " "Info: Total cell delay = 3.115 ns ( 41.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.459 ns ( 58.87 % ) " "Info: Total interconnect delay = 4.459 ns ( 58.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.574 ns" { clk clkdiv:inst1|clk_8hz keypro:inst|fdnlight[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.574 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_8hz {} keypro:inst|fdnlight[5] {} } { 0.000ns 0.000ns 0.560ns 3.899ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[1] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.574 ns" { clk clkdiv:inst1|clk_8hz keypro:inst|fdnlight[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.574 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_8hz {} keypro:inst|fdnlight[5] {} } { 0.000ns 0.000ns 0.560ns 3.899ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "keypro.vhd" "" { Text "E:/project/elevator/keypro.vhd" 35 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "9.786 ns" { keypro:inst|fdnlight[5] elerun:inst3|LessThan6~259 elerun:inst3|LessThan6~261 elerun:inst3|process0~954 elerun:inst3|process0~963 elerun:inst3|Selector5~187 elerun:inst3|udsig[2]~1014 elerun:inst3|udsig[2]~1016 elerun:inst3|udsig[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "9.786 ns" { keypro:inst|fdnlight[5] {} elerun:inst3|LessThan6~259 {} elerun:inst3|LessThan6~261 {} elerun:inst3|process0~954 {} elerun:inst3|process0~963 {} elerun:inst3|Selector5~187 {} elerun:inst3|udsig[2]~1014 {} elerun:inst3|udsig[2]~1016 {} elerun:inst3|udsig[1] {} } { 0.000ns 1.251ns 1.130ns 0.449ns 0.716ns 1.590ns 0.433ns 0.448ns 0.796ns } { 0.000ns 0.590ns 0.590ns 0.292ns 0.114ns 0.114ns 0.114ns 0.292ns 0.867ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[1] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[1] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.574 ns" { clk clkdiv:inst1|clk_8hz keypro:inst|fdnlight[5] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.574 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_8hz {} keypro:inst|fdnlight[5] {} } { 0.000ns 0.000ns 0.560ns 3.899ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_TSU_RESULT" "elerun:inst3\|udsig\[6\] alarm clk 4.019 ns register " "Info: tsu for register \"elerun:inst3\|udsig\[6\]\" (data pin = \"alarm\", clock pin = \"clk\") is 4.019 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.555 ns + Longest pin register " "Info: + Longest pin to register delay is 11.555 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns alarm 1 PIN PIN_59 2 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_59; Fanout = 2; PIN Node = 'alarm'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { alarm } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 192 304 472 208 "alarm" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(5.873 ns) + CELL(0.590 ns) 7.938 ns elerun:inst3\|udsig\[2\]~1010 2 COMB LC_X22_Y7_N2 1 " "Info: 2: + IC(5.873 ns) + CELL(0.590 ns) = 7.938 ns; Loc. = LC_X22_Y7_N2; Fanout = 1; COMB Node = 'elerun:inst3\|udsig\[2\]~1010'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.463 ns" { alarm elerun:inst3|udsig[2]~1010 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.097 ns) + CELL(0.442 ns) 9.477 ns elerun:inst3\|udsig\[2\]~1011 3 COMB LC_X24_Y7_N2 2 " "Info: 3: + IC(1.097 ns) + CELL(0.442 ns) = 9.477 ns; Loc. = LC_X24_Y7_N2; Fanout = 2; COMB Node = 'elerun:inst3\|udsig\[2\]~1011'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.539 ns" { elerun:inst3|udsig[2]~1010 elerun:inst3|udsig[2]~1011 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.449 ns) + CELL(0.292 ns) 10.218 ns elerun:inst3\|udsig\[6\]~1012 4 COMB LC_X24_Y7_N6 1 " "Info: 4: + IC(0.449 ns) + CELL(0.292 ns) = 10.218 ns; Loc. = LC_X24_Y7_N6; Fanout = 1; COMB Node = 'elerun:inst3\|udsig\[6\]~1012'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.741 ns" { elerun:inst3|udsig[2]~1011 elerun:inst3|udsig[6]~1012 } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.470 ns) + CELL(0.867 ns) 11.555 ns elerun:inst3\|udsig\[6\] 5 REG LC_X24_Y7_N0 4 " "Info: 5: + IC(0.470 ns) + CELL(0.867 ns) = 11.555 ns; Loc. = LC_X24_Y7_N0; Fanout = 4; REG Node = 'elerun:inst3\|udsig\[6\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.337 ns" { elerun:inst3|udsig[6]~1012 elerun:inst3|udsig[6] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.666 ns ( 31.73 % ) " "Info: Total cell delay = 3.666 ns ( 31.73 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.889 ns ( 68.27 % ) " "Info: Total interconnect delay = 7.889 ns ( 68.27 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "11.555 ns" { alarm elerun:inst3|udsig[2]~1010 elerun:inst3|udsig[2]~1011 elerun:inst3|udsig[6]~1012 elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "11.555 ns" { alarm {} alarm~out0 {} elerun:inst3|udsig[2]~1010 {} elerun:inst3|udsig[2]~1011 {} elerun:inst3|udsig[6]~1012 {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 5.873ns 1.097ns 0.449ns 0.470ns } { 0.000ns 1.475ns 0.590ns 0.442ns 0.292ns 0.867ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 7.573 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 7.573 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_17 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 7; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 192 64 232 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.935 ns) 2.964 ns clkdiv:inst1\|clk_2hz 2 REG LC_X11_Y6_N5 34 " "Info: 2: + IC(0.560 ns) + CELL(0.935 ns) = 2.964 ns; Loc. = LC_X11_Y6_N5; Fanout = 34; REG Node = 'clkdiv:inst1\|clk_2hz'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.495 ns" { clk clkdiv:inst1|clk_2hz } "NODE_NAME" } } { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.898 ns) + CELL(0.711 ns) 7.573 ns elerun:inst3\|udsig\[6\] 3 REG LC_X24_Y7_N0 4 " "Info: 3: + IC(3.898 ns) + CELL(0.711 ns) = 7.573 ns; Loc. = LC_X24_Y7_N0; Fanout = 4; REG Node = 'elerun:inst3\|udsig\[6\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.609 ns" { clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 41.13 % ) " "Info: Total cell delay = 3.115 ns ( 41.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.458 ns ( 58.87 % ) " "Info: Total interconnect delay = 4.458 ns ( 58.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "11.555 ns" { alarm elerun:inst3|udsig[2]~1010 elerun:inst3|udsig[2]~1011 elerun:inst3|udsig[6]~1012 elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "11.555 ns" { alarm {} alarm~out0 {} elerun:inst3|udsig[2]~1010 {} elerun:inst3|udsig[2]~1011 {} elerun:inst3|udsig[6]~1012 {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 5.873ns 1.097ns 0.449ns 0.470ns } { 0.000ns 1.475ns 0.590ns 0.442ns 0.292ns 0.867ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk udsig\[6\] elerun:inst3\|udsig\[6\] 14.472 ns register " "Info: tco from clock \"clk\" to destination pin \"udsig\[6\]\" through register \"elerun:inst3\|udsig\[6\]\" is 14.472 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 7.573 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 7.573 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_17 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 7; CLK Node = 'clk'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 192 64 232 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.935 ns) 2.964 ns clkdiv:inst1\|clk_2hz 2 REG LC_X11_Y6_N5 34 " "Info: 2: + IC(0.560 ns) + CELL(0.935 ns) = 2.964 ns; Loc. = LC_X11_Y6_N5; Fanout = 34; REG Node = 'clkdiv:inst1\|clk_2hz'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.495 ns" { clk clkdiv:inst1|clk_2hz } "NODE_NAME" } } { "clkdiv.vhd" "" { Text "E:/project/elevator/clkdiv.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.898 ns) + CELL(0.711 ns) 7.573 ns elerun:inst3\|udsig\[6\] 3 REG LC_X24_Y7_N0 4 " "Info: 3: + IC(3.898 ns) + CELL(0.711 ns) = 7.573 ns; Loc. = LC_X24_Y7_N0; Fanout = 4; REG Node = 'elerun:inst3\|udsig\[6\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.609 ns" { clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 41.13 % ) " "Info: Total cell delay = 3.115 ns ( 41.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.458 ns ( 58.87 % ) " "Info: Total interconnect delay = 4.458 ns ( 58.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.675 ns + Longest register pin " "Info: + Longest register to pin delay is 6.675 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns elerun:inst3\|udsig\[6\] 1 REG LC_X24_Y7_N0 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X24_Y7_N0; Fanout = 4; REG Node = 'elerun:inst3\|udsig\[6\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { elerun:inst3|udsig[6] } "NODE_NAME" } } { "elerun.vhd" "" { Text "E:/project/elevator/elerun.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(4.551 ns) + CELL(2.124 ns) 6.675 ns udsig\[6\] 2 PIN PIN_33 0 " "Info: 2: + IC(4.551 ns) + CELL(2.124 ns) = 6.675 ns; Loc. = PIN_33; Fanout = 0; PIN Node = 'udsig\[6\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.675 ns" { elerun:inst3|udsig[6] udsig[6] } "NODE_NAME" } } { "elevator.bdf" "" { Schematic "E:/project/elevator/elevator.bdf" { { 272 776 952 288 "udsig\[7..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.124 ns ( 31.82 % ) " "Info: Total cell delay = 2.124 ns ( 31.82 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.551 ns ( 68.18 % ) " "Info: Total interconnect delay = 4.551 ns ( 68.18 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.675 ns" { elerun:inst3|udsig[6] udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "6.675 ns" { elerun:inst3|udsig[6] {} udsig[6] {} } { 0.000ns 4.551ns } { 0.000ns 2.124ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.573 ns" { clk clkdiv:inst1|clk_2hz elerun:inst3|udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "7.573 ns" { clk {} clk~out0 {} clkdiv:inst1|clk_2hz {} elerun:inst3|udsig[6] {} } { 0.000ns 0.000ns 0.560ns 3.898ns } { 0.000ns 1.469ns 0.935ns 0.711ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.675 ns" { elerun:inst3|udsig[6] udsig[6] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "6.675 ns" { elerun:inst3|udsig[6] {} udsig[6] {} } { 0.000ns 4.551ns } { 0.000ns 2.124ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0}

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