elevator.qsf

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# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		elevator_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C3T144C8
set_global_assignment -name TOP_LEVEL_ENTITY elevator
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:50:02  DECEMBER 24, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name BDF_FILE elevator.bdf
set_global_assignment -name VHDL_FILE clkdiv.vhd
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name VHDL_FILE floorled.vhd
set_global_assignment -name VHDL_FILE elerun.vhd
set_global_assignment -name VHDL_FILE keypro.vhd
set_location_assignment PIN_16 -to clk
set_location_assignment PIN_32 -to alarm
set_location_assignment PIN_33 -to doorlight
set_location_assignment PIN_34 -to FDN[6]
set_location_assignment PIN_35 -to FDN[5]
set_location_assignment PIN_36 -to FDN[4]
set_location_assignment PIN_37 -to FDN[3]
set_location_assignment PIN_39 -to FDN[2]
set_location_assignment PIN_40 -to FUP[5]
set_location_assignment PIN_41 -to FUP[4]
set_location_assignment PIN_42 -to FUP[3]
set_location_assignment PIN_50 -to FUP[2]
set_location_assignment PIN_51 -to FUP[1]
set_location_assignment PIN_52 -to posled[7]
set_location_assignment PIN_53 -to posled[6]
set_location_assignment PIN_54 -to posled[5]
set_location_assignment PIN_55 -to posled[4]
set_location_assignment PIN_57 -to posled[3]
set_location_assignment PIN_58 -to posled[2]
set_location_assignment PIN_59 -to posled[1]
set_location_assignment PIN_60 -to posled[0]
set_location_assignment PIN_62 -to reset
set_location_assignment PIN_67 -to ST[6]
set_location_assignment PIN_68 -to ST[5]
set_location_assignment PIN_69 -to ST[4]
set_location_assignment PIN_70 -to ST[3]
set_location_assignment PIN_71 -to ST[2]
set_location_assignment PIN_72 -to ST[1]
set_location_assignment PIN_73 -to tiqian
set_location_assignment PIN_74 -to udsig[7]
set_location_assignment PIN_75 -to udsig[6]
set_location_assignment PIN_76 -to udsig[5]
set_location_assignment PIN_77 -to udsig[4]
set_location_assignment PIN_78 -to udsig[3]
set_location_assignment PIN_82 -to udsig[2]
set_location_assignment PIN_83 -to udsig[1]
set_location_assignment PIN_84 -to udsig[0]
set_location_assignment PIN_85 -to yanshi