floorled.vhd

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library ieee;
use ieee.std_logic_1164.all;

entity floorled is
port
(	clk : in std_logic;
	position :in std_logic_vector(2 downto 0);
	posled : out std_logic_vector(7 downto 0)
);
	
end floorled;
architecture behave of floorled is

begin
process(clk)
begin
	if clk 'event and clk = '1' then
		case position is
			when "001" => posled <= "01100000";
			when "010" => posled <= "11011010";
			when "011" => posled <= "11110010";
			when "100" => posled <= "01100110";
			when "101" => posled <= "10110110";
			when "110" => posled <= "10111110";
			when others=>posled <= "01100000";
		end case;
	end if;
end process ;	
end behave;