sources.sth

RTL in Verilog (Vending Machine)

[Files List]
C:\Program Files\Aldec\Active-HDL 8.1\Vlib\Std/src/standard.vhd=S
C:\My_Designs\lab04\vending_machine/src/integer2bcd.v=S
C:\My_Designs\lab04\vending_machine/src/vending_machine.v=S