📄 link_port_rx.c
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/*****************************************************************************************************
Example code showing the DMA transfer from linkport 0 to internal memory and then a transfer
from internal memory back out to link port 0.
******************************************************************************************************/
#define __NOUNDERSCORES__ // Depending on the compiler patch installed, the register names as defined in sysreg.h
// may now have two underscores prepended so that they do not restrict the namespace
// of user programs. If the old names are required as in this example(without the
// underscores prepended),
// define the preprocessor macro __NOUNDERSCORES__ before including sysreg.h.
// Only required with compiler patch 6.1.7 or later
#include "sysreg.h"
#include "signal.h"
#include "stdio.h"
#define N 64 // Number of words to transfer
int dm data_rx_tx[N]; // Data to be received and transmitted back through link port
struct TCB {
int *DI; // index
int DX; // count and stride in x direction
int DY; // count and stride in y direction
int DP; // DMA control word
};
struct TCB TCB_temp; // Temp structure for programming TCBs
__builtin_quad q; // Temp quad for programming TCBs
void dma4_int(); // Prototype for interrupt service routine
void dma8_int();
void main(void)
{
int i=0;
interrupt(SIGDMA4, dma4_int); // Assign isr to DMA channel 4 (Link port 0 transmit)
interrupt(SIGDMA8, dma8_int); // Assign isr to DMA channel 8 (Link port 0 receive)
TCB_temp.DI = data_rx_tx; // index points to source buffer
TCB_temp.DX = 4 | (N << 16); // modify is 4 for quad-word transfers, count is N and must be shifted to upper half
TCB_temp.DY = 0; // only a 1 dimension DMA
TCB_temp.DP = 0x47000000; // control word set for quad-word transfers to internal memory with interrupt enabled
__builtin_sysreg_write(LCTL0, 0x000004DA);
q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
__builtin_sysreg_write4(DC8, q); // program the TCBs
while(1) // Endless loop
i=i-i;
}
/*********************************************************************************************************************************************/
/* DMA8 Interrupt Service Routine ***********************************************************************************************************/
/*********************************************************************************************************************************************/
void dma8_int() // ISR for DMA channel 8
{
interrupt(SIGDMA4, dma4_int); // Assign isr to DMA channel 4
TCB_temp.DI = data_rx_tx; // index points to source buffer in external memory
TCB_temp.DP = 0x47000000; // control word set for quad-word transfers to internal memory with interrupt enabled
q = __builtin_compose_128((long long)TCB_temp.DI | (long long)TCB_temp.DX << 32, (long long)(TCB_temp.DY | (long long)TCB_temp.DP << 32));
__builtin_sysreg_write4(DC4, q); // program the TCBs
return;
}
/*********************************************************************************************************************************************/
/* DMA4 Interrupt Service Routine ***********************************************************************************************************/
/*********************************************************************************************************************************************/
void dma4_int() // ISR for DMA channel 4
{
printf("\nLink port DMAs completed\n");
return;
}
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