taxt.fit.eqn

FPGA VHDL 语言的的士计费系统！与现有的的士计费系统功能一样。

Z3L4_cout_1 = !W1L13 & !W1L23 & !Z3L7;
Z3L4 = CARRY(Z3L4_cout_1);


--Z2L7 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_8|add_sub_cella[3]~68 at LC_X23_Y20_N6
--operation mode is arithmetic

Z2L7_cout_0 = !W1L02 & !W1L91 & !Z2L01;
Z2L7 = CARRY(Z2L7_cout_0);

--Z2L8 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_8|add_sub_cella[3]~68COUT1_103 at LC_X23_Y20_N6
--operation mode is arithmetic

Z2L8_cout_1 = !W1L02 & !W1L91 & !Z2L11;
Z2L8 = CARRY(Z2L8_cout_1);


--Z1L7 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_7|add_sub_cella[3]~68 at LC_X21_Y21_N6
--operation mode is arithmetic

Z1L7_cout_0 = !W1L9 & !W1L01 & !Z1L41;
Z1L7 = CARRY(Z1L7_cout_0);

--Z1L8 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_7|add_sub_cella[3]~68COUT1_103 at LC_X21_Y21_N6
--operation mode is arithmetic

Z1L8_cout_1 = !W1L9 & !W1L01 & !Z1L51;
Z1L8 = CARRY(Z1L8_cout_1);


--Y1L6 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~57 at LC_X22_Y20_N5
--operation mode is arithmetic

Y1L6_carry_eqn = (!Y1L31 & GND) # (Y1L31 & VCC);
Y1L6 = C1_stance[9] $ !Y1L6_carry_eqn;

--Y1L7 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~59 at LC_X22_Y20_N5
--operation mode is arithmetic

Y1L7_cout_0 = C1_stance[9] & !Y1L31;
Y1L7 = CARRY(Y1L7_cout_0);

--Y1L8 is d_to_b:inst|lpm_divide:div_rtl_7|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~59COUT1_88 at LC_X22_Y20_N5
--operation mode is arithmetic

Y1L8_cout_1 = C1_stance[9] & !Y1L31;
Y1L8 = CARRY(Y1L8_cout_1);


--Z6L3 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_9|add_sub_cella[3]~75 at LC_X25_Y22_N6
--operation mode is arithmetic

Z6L3_cout_0 = !W2L23 & !W2L13 & !Z6L6;
Z6L3 = CARRY(Z6L3_cout_0);

--Z6L4 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_9|add_sub_cella[3]~75COUT1_107 at LC_X25_Y22_N6
--operation mode is arithmetic

Z6L4_cout_1 = !W2L23 & !W2L13 & !Z6L7;
Z6L4 = CARRY(Z6L4_cout_1);


--Z5L7 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_8|add_sub_cella[3]~68 at LC_X26_Y22_N6
--operation mode is arithmetic

Z5L7_cout_0 = !W2L91 & !W2L02 & !Z5L01;
Z5L7 = CARRY(Z5L7_cout_0);

--Z5L8 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_8|add_sub_cella[3]~68COUT1_103 at LC_X26_Y22_N6
--operation mode is arithmetic

Z5L8_cout_1 = !W2L91 & !W2L02 & !Z5L11;
Z5L8 = CARRY(Z5L8_cout_1);


--Z4L7 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_7|add_sub_cella[3]~68 at LC_X29_Y22_N6
--operation mode is arithmetic

Z4L7_cout_0 = !W2L9 & !W2L01 & !Z4L41;
Z4L7 = CARRY(Z4L7_cout_0);

--Z4L8 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_re8:add_sub_7|add_sub_cella[3]~68COUT1_103 at LC_X29_Y22_N6
--operation mode is arithmetic

Z4L8_cout_1 = !W2L9 & !W2L01 & !Z4L51;
Z4L8 = CARRY(Z4L8_cout_1);


--Y2L6 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~57 at LC_X28_Y21_N5
--operation mode is arithmetic

Y2L6_carry_eqn = (!Y2L31 & GND) # (Y2L31 & VCC);
Y2L6 = C1_money[9] $ !Y2L6_carry_eqn;

--Y2L7 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~59 at LC_X28_Y21_N5
--operation mode is arithmetic

Y2L7_cout_0 = C1_money[9] & !Y2L31;
Y2L7 = CARRY(Y2L7_cout_0);

--Y2L8 is d_to_b:inst1|lpm_divide:div_rtl_0|lpm_divide_0nf:auto_generated|sign_div_unsign_2jg:divider|alt_u_div_9od:divider|add_sub_qe8:add_sub_6|add_sub_cella[3]~59COUT1_88 at LC_X28_Y21_N5
--operation mode is arithmetic

Y2L8_cout_1 = C1_money[9] & !Y2L31;
Y2L8 = CARRY(Y2L8_cout_1);


--S62L3 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~55 at LC_X25_Y21_N3
--operation mode is arithmetic

S62L3_cout_0 = !M4L83 & !M4L73 & !S62L6;
S62L3 = CARRY(S62L3_cout_0);

--S62L4 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~55COUT1_76 at LC_X25_Y21_N3
--operation mode is arithmetic

S62L4_cout_1 = !M4L83 & !M4L73 & !S62L7;
S62L4 = CARRY(S62L4_cout_1);


--S52L7 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~49 at LC_X26_Y19_N8
--operation mode is arithmetic

S52L7_cout_0 = !M4L92 & !M4L03 & !S52L01;
S52L7 = CARRY(S52L7_cout_0);

--S52L8 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~49COUT1_73 at LC_X26_Y19_N8
--operation mode is arithmetic

S52L8_cout_1 = !M4L92 & !M4L03 & !S52L11;
S52L8 = CARRY(S52L8_cout_1);


--S23L31 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~58 at LC_X25_Y20_N3
--operation mode is arithmetic

S23L31_cout_0 = !M5L81 & !M5L71 & !S23L01;
S23L31 = CARRY(S23L31_cout_0);

--S23L41 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~58COUT1_72 at LC_X25_Y20_N3
--operation mode is arithmetic

S23L41_cout_1 = !M5L81 & !M5L71 & !S23L11;
S23L41 = CARRY(S23L41_cout_1);


--S23L61 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~63 at LC_X25_Y20_N0
--operation mode is arithmetic

S23L61_cout_0 = S23L81;
S23L61 = CARRY(S23L61_cout_0);

--S23L71 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~63COUT1_70 at LC_X25_Y20_N0
--operation mode is arithmetic

S23L71_cout_1 = S23L81;
S23L71 = CARRY(S23L71_cout_1);


--S13L01 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~53 at LC_X27_Y20_N3
--operation mode is arithmetic

S13L01_cout_0 = !M5L21 & !M5L11 & !S13L61;
S13L01 = CARRY(S13L01_cout_0);

--S13L11 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~53COUT1_72 at LC_X27_Y20_N3
--operation mode is arithmetic

S13L11_cout_1 = !M5L21 & !M5L11 & !S13L71;
S13L11 = CARRY(S13L11_cout_1);


--S42L7 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~49 at LC_X26_Y20_N8
--operation mode is arithmetic

S42L7_cout_0 = !M4L42 & !M4L32 & !S42L31;
S42L7 = CARRY(S42L7_cout_0);

--S42L8 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~49COUT1_73 at LC_X26_Y20_N8
--operation mode is arithmetic

S42L8_cout_1 = !M4L42 & !M4L32 & !S42L41;
S42L8 = CARRY(S42L8_cout_1);


--S32L7 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~49 at LC_X29_Y17_N8
--operation mode is arithmetic

S32L7_cout_0 = !M4L81 & !M4L71 & !S32L31;
S32L7 = CARRY(S32L7_cout_0);

--S32L8 is d_to_b:inst1|lpm_divide:div_rtl_1|lpm_divide_tmf:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~49COUT1_74 at LC_X29_Y17_N8
--operation mode is arithmetic

S32L8_cout_1 = !M4L81 & !M4L71 & !S32L41;
S32L8 = CARRY(S32L8_cout_1);


--S03L7 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~48 at LC_X29_Y20_N3
--operation mode is arithmetic

S03L7_cout_0 = !M5L6 & !M5L5 & !S03L31;
S03L7 = CARRY(S03L7_cout_0);

--S03L8 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~48COUT1_72 at LC_X29_Y20_N3
--operation mode is arithmetic

S03L8_cout_1 = !M5L6 & !M5L5 & !S03L41;
S03L8 = CARRY(S03L8_cout_1);


--M5L7 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|StageOut[36]~23 at LC_X28_Y20_N3
--operation mode is normal

M5L7 = S32L5 & !S03L5;


--M5L8 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|StageOut[36]~28 at LC_X28_Y20_N4
--operation mode is normal

M5L8 = S03L5 & (!S03_add_sub_cella[1]);


--S13L31 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~58 at LC_X27_Y20_N0
--operation mode is arithmetic

S13L31_cout_0 = S13L81;
S13L31 = CARRY(S13L31_cout_0);

--S13L41 is d_to_b:inst1|lpm_divide:mod_rtl_2|lpm_divide_0ff:auto_generated|sign_div_unsign_vig:divider|alt_u_div_3od:divider|add_sub_oe8:add_sub_8|add_sub_cella[2]~58COUT1_70 at LC_X27_Y20_N0
--operation mode is arithmetic

S13L41_cout_1 = S13L81;
S13L41 = CARRY(S13L41_cout_1);


--C1_time[0] is speed:inst2|time[0] at LC_X28_Y15_N0
--operation mode is arithmetic

C1_time[0]_lut_out = !C1_time[0];
C1_time[0] = DFFEAS(C1_time[0]_lut_out, GLOBAL(C1_mint), GLOBAL(start), , , , , C1L751, );

--C1L172 is speed:inst2|time[0]~229 at LC_X28_Y15_N0
--operation mode is arithmetic

C1L172_cout_0 = C1_time[0];
C1L172 = CARRY(C1L172_cout_0);

--C1L272 is speed:inst2|time[0]~229COUT1_269 at LC_X28_Y15_N0
--operation mode is arithmetic

C1L272_cout_1 = C1_time[0];
C1L272 = CARRY(C1L272_cout_1);


--C1_time[8] is speed:inst2|time[8] at LC_X28_Y15_N8
--operation mode is arithmetic

C1_time[8]_carry_eqn = (!C1L382 & C1L192) # (C1L382 & C1L292);
C1_time[8]_lut_out = C1_time[8] $ !C1_time[8]_carry_eqn;
C1_time[8] = DFFEAS(C1_time[8]_lut_out, GLOBAL(C1_mint), GLOBAL(start), , , , , C1L751, );

--C1L492 is speed:inst2|time[8]~233 at LC_X28_Y15_N8
--operation mode is arithmetic

C1L492_cout_0 = C1_time[8] & !C1L192;
C1L492 = CARRY(C1L492_cout_0);

--C1L592 is speed:inst2|time[8]~233COUT1_276 at LC_X28_Y15_N8
--operation mode is arithmetic

C1L592_cout_1 = C1_time[8] & !C1L292;
C1L592 = CARRY(C1L592_cout_1);


--C1_time[2] is speed:inst2|time[2] at LC_X28_Y15_N2
--operation mode is arithmetic

C1_time[2]_lut_out = C1_time[2] $ (!C1L472);
C1_time[2] = DFFEAS(C1_time[2]_lut_out, GLOBAL(C1_mint), GLOBAL(start), , , , , C1L751, );

--C1L772 is speed:inst2|time[2]~237 at LC_X28_Y15_N2
--operation mode is arithmetic

C1L772_cout_0 = C1_time[2] & (!C1L472);
C1L772 = CARRY(C1L772_cout_0);

--C1L872 is speed:inst2|time[2]~237COUT1_271 at LC_X28_Y15_N2
--operation mode is arithmetic

C1L872_cout_1 = C1_time[2] & (!C1L572);
C1L872 = CARRY(C1L872_cout_1);


--C1_time[5] is speed:inst2|time[5] at LC_X28_Y15_N5
--operation mode is arithmetic

C1_time[5]_carry_eqn = C1L382;
C1_time[5]_lut_out = C1_time[5] $ C1_time[5]_carry_eqn;
C1_time[5] = DFFEAS(C1_time[5]_lut_out, GLOBAL(C1_mint), GLOBAL(start), , , , , C1L751, );

--C1L582 is speed:inst2|time[5]~241 at LC_X28_Y15_N5
--operation mode is arithmetic

C1L582_cout_0 = !C1L382 # !C1_time[5];
C1L582 = CARRY(C1L582_cout_0);

--C1L682 is speed:inst2|time[5]~241COUT1_273 at LC_X28_Y15_N5
--operation mode is arithmetic

C1L682_cout_1 = !C1L382 # !C1_time[5];
C1L682 = CARRY(C1L682_cout_1);


--C1_time[6] is speed:inst2|time[6] at LC_X28_Y15_N6
--operation mode is arithmetic

C1_time[6]_carry_eqn = (!C1L382 & C1L582) # (C1L382 & C1L682);
C1_time[6]_lut_out = C1_time[6] $ (!C1_time[6]_carry_eqn);
C1_time[6] = DFFEAS(C1_time[6]_lut_out, GLOBAL(C1_mint), GLOBAL(start), , , , , C1L751, );

--C1L882 is speed:inst2|time[6]~245 at LC_X28_Y15_N6
--operation mode is arithmetic

C1L882_cout_0 = C1_time[6] & (!C1L582);
C1L882 = CARRY(C1L882_cout_0);

--C1L982 is speed:inst2|time[6]~245COUT1_274 at LC_X28_Y15_N6
--operation mode is arithmetic

C1L982_cout_1 = C1_time[6] & (!C1L682);
C1L982 = CARRY(C1L982_cout_1);


--C1_time[7] is speed:inst2|time[7] at LC_X28_Y15_N7
--operation mode is arithmetic

C1_time[7]_carry_eqn = (!C1L382 & C1L882) # (C1L382 &