⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 csl_venchal_270.h

📁 dm270 source code
💻 H
📖 第 1 页 / 共 5 页
字号:

#define _VENC_HDELAY_HDLY_SHIFT		(0)
#define _VENC_HDELAY_HDLY_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _VENC_HDELAY_HDLY_MASK			(_VENC_HDELAY_HDLY_MK(0x0fffu))
#define _VENC_HDELAY_HDLY_CLR			(~(_VENC_HDELAY_HDLY_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC VDELAY register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_VDELAY_GET()			_REG_GET(_VENC_VDELAY_ADDR)
#define _VENC_VDELAY_SET(Val)			_REG_SET(_VENC_VDELAY_ADDR, Val)
#define _VENC_VDELAY_AOI(AND,OR,INV)		_REG_AOI(_VENC_VDELAY_ADDR,AND,OR,INV)
#define _VENC_VDELAY_FGET(Field)			_FIELD_GET(_VENC_VDELAY_ADDR, _VENC_VDELAY_##Field##)
#define _VENC_VDELAY_FSET(Field, Val)		_FIELD_SET(_VENC_VDELAY_ADDR, _VENC_VDELAY_##Field##, Val)
#define _VENC_VDELAY_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_VDELAY_ADDR, _VENC_VDELAY_##Field##, AND, OR, INV)

#define _VENC_VDELAY_VDLY_SHIFT		(0)
#define _VENC_VDELAY_VDLY_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _VENC_VDELAY_VDLY_MASK			(_VENC_VDELAY_VDLY_MK(0x0fffu))
#define _VENC_VDELAY_VDLY_CLR			(~(_VENC_VDELAY_VDLY_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC CULLLINE register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_CULLLINE_GET()			_REG_GET(_VENC_CULLLINE_ADDR)
#define _VENC_CULLLINE_SET(Val)			_REG_SET(_VENC_CULLLINE_ADDR, Val)
#define _VENC_CULLLINE_AOI(AND,OR,INV)		_REG_AOI(_VENC_CULLLINE_ADDR,AND,OR,INV)
#define _VENC_CULLLINE_FGET(Field)			_FIELD_GET(_VENC_CULLLINE_ADDR, _VENC_CULLLINE_##Field##)
#define _VENC_CULLLINE_FSET(Field, Val)		_FIELD_SET(_VENC_CULLLINE_ADDR, _VENC_CULLLINE_##Field##, Val)
#define _VENC_CULLLINE_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_CULLLINE_ADDR, _VENC_CULLLINE_##Field##, AND, OR, INV)

#define _VENC_CULLLINE_ODDS_SHIFT		(12)
#define _VENC_CULLLINE_ODDS_MK(n)		(((Uint16)(n) & 0x000fu) << _VENC_CULLLINE_ODDS_SHIFT)
#define _VENC_CULLLINE_ODDS_MASK			(_VENC_CULLLINE_ODDS_MK(0x000fu))
#define _VENC_CULLLINE_ODDS_CLR			(~(_VENC_CULLLINE_ODDS_MASK))

#define _VENC_CULLLINE_EVNS_SHIFT		(8)
#define _VENC_CULLLINE_EVNS_MK(n)		(((Uint16)(n) & 0x000fu) << _VENC_CULLLINE_EVNS_SHIFT)
#define _VENC_CULLLINE_EVNS_MASK			(_VENC_CULLLINE_EVNS_MK(0x000fu))
#define _VENC_CULLLINE_EVNS_CLR			(~(_VENC_CULLLINE_EVNS_MASK))

#define _VENC_CULLLINE_CULL_SHIFT		(0)
#define _VENC_CULLLINE_CULL_MK(n)		((Uint16)(n) & 0x000fu) 
#define _VENC_CULLLINE_CULL_MASK			(_VENC_CULLLINE_CULL_MK(0x000fu))
#define _VENC_CULLLINE_CULL_CLR			(~(_VENC_CULLLINE_CULL_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC PWMCTRL register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_PWMCTRL_GET()			_REG_GET(_VENC_PWMCTRL_ADDR)
#define _VENC_PWMCTRL_SET(Val)			_REG_SET(_VENC_PWMCTRL_ADDR, Val)
#define _VENC_PWMCTRL_AOI(AND,OR,INV)		_REG_AOI(_VENC_PWMCTRL_ADDR,AND,OR,INV)
#define _VENC_PWMCTRL_FGET(Field)			_FIELD_GET(_VENC_PWMCTRL_ADDR, _VENC_PWMCTRL_##Field##)
#define _VENC_PWMCTRL_FSET(Field, Val)		_FIELD_SET(_VENC_PWMCTRL_ADDR, _VENC_PWMCTRL_##Field##, Val)
#define _VENC_PWMCTRL_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_PWMCTRL_ADDR, _VENC_PWMCTRL_##Field##, AND, OR, INV)

#define _VENC_PWMCTRL_PWME_SHIFT		(15)
#define _VENC_PWMCTRL_PWME_MK(n)		(((Uint16)(n) & 0x0001u) << _VENC_PWMCTRL_PWME_SHIFT)
#define _VENC_PWMCTRL_PWME_MASK			(_VENC_PWMCTRL_PWME_MK(0x0001u))
#define _VENC_PWMCTRL_PWME_CLR			(~(_VENC_PWMCTRL_PWME_MASK))

#define _VENC_PWMCTRL_PWMP_SHIFT		(14)
#define _VENC_PWMCTRL_PWMP_MK(n)		(((Uint16)(n) & 0x0001u) << _VENC_PWMCTRL_PWMP_SHIFT)
#define _VENC_PWMCTRL_PWMP_MASK			(_VENC_PWMCTRL_PWMP_MK(0x0001u))
#define _VENC_PWMCTRL_PWMP_CLR			(~(_VENC_PWMCTRL_PWMP_MASK))

#define _VENC_PWMCTRL_PRS_SHIFT		(0)
#define _VENC_PWMCTRL_PRS_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _VENC_PWMCTRL_PRS_MASK			(_VENC_PWMCTRL_PRS_MK(0x0fffu))
#define _VENC_PWMCTRL_PRS_CLR			(~(_VENC_PWMCTRL_PRS_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC PWMCNT register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_PWMCNT_GET()			_REG_GET(_VENC_PWMCNT_ADDR)
#define _VENC_PWMCNT_SET(Val)			_REG_SET(_VENC_PWMCNT_ADDR, Val)
#define _VENC_PWMCNT_AOI(AND,OR,INV)		_REG_AOI(_VENC_PWMCNT_ADDR,AND,OR,INV)
#define _VENC_PWMCNT_FGET(Field)			_FIELD_GET(_VENC_PWMCNT_ADDR, _VENC_PWMCNT_##Field##)
#define _VENC_PWMCNT_FSET(Field, Val)		_FIELD_SET(_VENC_PWMCNT_ADDR, _VENC_PWMCNT_##Field##, Val)
#define _VENC_PWMCNT_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_PWMCNT_ADDR, _VENC_PWMCNT_##Field##, AND, OR, INV)

#define _VENC_PWMCNT_CNT_SHIFT		(0)
#define _VENC_PWMCNT_CNT_MK(n)		((Uint16)(n) & 0x0fffu) 
#define _VENC_PWMCNT_CNT_MASK			(_VENC_PWMCNT_CNT_MK(0x0fffu))
#define _VENC_PWMCNT_CNT_CLR			(~(_VENC_PWMCNT_CNT_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC RGBLEVEL register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_RGBLEVEL_GET()			_REG_GET(_VENC_RGBLEVEL_ADDR)
#define _VENC_RGBLEVEL_SET(Val)			_REG_SET(_VENC_RGBLEVEL_ADDR, Val)
#define _VENC_RGBLEVEL_AOI(AND,OR,INV)		_REG_AOI(_VENC_RGBLEVEL_ADDR,AND,OR,INV)
#define _VENC_RGBLEVEL_FGET(Field)			_FIELD_GET(_VENC_RGBLEVEL_ADDR, _VENC_RGBLEVEL_##Field##)
#define _VENC_RGBLEVEL_FSET(Field, Val)		_FIELD_SET(_VENC_RGBLEVEL_ADDR, _VENC_RGBLEVEL_##Field##, Val)
#define _VENC_RGBLEVEL_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_RGBLEVEL_ADDR, _VENC_RGBLEVEL_##Field##, AND, OR, INV)

#define _VENC_RGBLEVEL_CLIP_SHIFT		(8)
#define _VENC_RGBLEVEL_CLIP_MK(n)		(((Uint16)(n) & 0x00ffu) << _VENC_RGBLEVEL_CLIP_SHIFT)
#define _VENC_RGBLEVEL_CLIP_MASK			(_VENC_RGBLEVEL_CLIP_MK(0x00ffu))
#define _VENC_RGBLEVEL_CLIP_CLR			(~(_VENC_RGBLEVEL_CLIP_MASK))

#define _VENC_RGBLEVEL_BLK_SHIFT		(0)
#define _VENC_RGBLEVEL_BLK_MK(n)		((Uint16)(n) & 0x003fu) 
#define _VENC_RGBLEVEL_BLK_MASK			(_VENC_RGBLEVEL_BLK_MK(0x003fu))
#define _VENC_RGBLEVEL_BLK_CLR			(~(_VENC_RGBLEVEL_BLK_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC ATR0 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_ATR0_GET()			_REG_GET(_VENC_ATR0_ADDR)
#define _VENC_ATR0_SET(Val)			_REG_SET(_VENC_ATR0_ADDR, Val)
#define _VENC_ATR0_AOI(AND,OR,INV)		_REG_AOI(_VENC_ATR0_ADDR,AND,OR,INV)
#define _VENC_ATR0_FGET(Field)			_FIELD_GET(_VENC_ATR0_ADDR, _VENC_ATR0_##Field##)
#define _VENC_ATR0_FSET(Field, Val)		_FIELD_SET(_VENC_ATR0_ADDR, _VENC_ATR0_##Field##, Val)
#define _VENC_ATR0_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_ATR0_ADDR, _VENC_ATR0_##Field##, AND, OR, INV)

#define _VENC_ATR0_ATR0_SHIFT		(0)
#define _VENC_ATR0_ATR0_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _VENC_ATR0_ATR0_MASK			(_VENC_ATR0_ATR0_MK(0x00ffu))
#define _VENC_ATR0_ATR0_CLR			(~(_VENC_ATR0_ATR0_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC ATR1 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_ATR1_GET()			_REG_GET(_VENC_ATR1_ADDR)
#define _VENC_ATR1_SET(Val)			_REG_SET(_VENC_ATR1_ADDR, Val)
#define _VENC_ATR1_AOI(AND,OR,INV)		_REG_AOI(_VENC_ATR1_ADDR,AND,OR,INV)
#define _VENC_ATR1_FGET(Field)			_FIELD_GET(_VENC_ATR1_ADDR, _VENC_ATR1_##Field##)
#define _VENC_ATR1_FSET(Field, Val)		_FIELD_SET(_VENC_ATR1_ADDR, _VENC_ATR1_##Field##, Val)
#define _VENC_ATR1_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_ATR1_ADDR, _VENC_ATR1_##Field##, AND, OR, INV)

#define _VENC_ATR1_ATR1_SHIFT		(0)
#define _VENC_ATR1_ATR1_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _VENC_ATR1_ATR1_MASK			(_VENC_ATR1_ATR1_MK(0x00ffu))
#define _VENC_ATR1_ATR1_CLR			(~(_VENC_ATR1_ATR1_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC ATR2 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_ATR2_GET()			_REG_GET(_VENC_ATR2_ADDR)
#define _VENC_ATR2_SET(Val)			_REG_SET(_VENC_ATR2_ADDR, Val)
#define _VENC_ATR2_AOI(AND,OR,INV)		_REG_AOI(_VENC_ATR2_ADDR,AND,OR,INV)
#define _VENC_ATR2_FGET(Field)			_FIELD_GET(_VENC_ATR2_ADDR, _VENC_ATR2_##Field##)
#define _VENC_ATR2_FSET(Field, Val)		_FIELD_SET(_VENC_ATR2_ADDR, _VENC_ATR2_##Field##, Val)
#define _VENC_ATR2_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_ATR2_ADDR, _VENC_ATR2_##Field##, AND, OR, INV)

#define _VENC_ATR2_ATR2_SHIFT		(0)
#define _VENC_ATR2_ATR2_MK(n)		((Uint16)(n) & 0x00ffu) 
#define _VENC_ATR2_ATR2_MASK			(_VENC_ATR2_ATR2_MK(0x00ffu))
#define _VENC_ATR2_ATR2_CLR			(~(_VENC_ATR2_ATR2_MASK))



/*------------------------------------------------------------------------------*
* Register Macros for VENC REC656 register :
*                                                                                    
*                                                                                    
*                                                                                    
*---------------------------------------------------------------------------------*/

#define _VENC_REC656_GET()			_REG_GET(_VENC_REC656_ADDR)
#define _VENC_REC656_SET(Val)			_REG_SET(_VENC_REC656_ADDR, Val)
#define _VENC_REC656_AOI(AND,OR,INV)		_REG_AOI(_VENC_REC656_ADDR,AND,OR,INV)
#define _VENC_REC656_FGET(Field)			_FIELD_GET(_VENC_REC656_ADDR, _VENC_REC656_##Field##)
#define _VENC_REC656_FSET(Field, Val)		_FIELD_SET(_VENC_REC656_ADDR, _VENC_REC656_##Field##, Val)
#define _VENC_REC656_FAOI(Field, AND, OR, INV)	_FIELD_AOI(_VENC_REC656_ADDR, _VENC_REC656_##Field##, AND, OR, INV)

#define _VENC_REC656_FIDPOL_SHIFT		(6)
#define _VENC_REC656_FIDPOL_MK(n)		(((Uint16)(n) & 0x0001u) << _VENC_REC656_FIDPOL_SHIFT)
#define _VENC_REC656_FIDPOL_MASK			(_VENC_REC656_FIDPOL_MK(0x0001u))
#define _VENC_REC656_FIDPOL_CLR			(~(_VENC_REC656_FIDPOL_MASK))

#define _VENC_REC656_VOUTHLD_SHIFT		(4)
#define _VENC_REC656_VOUTHLD_MK(n)		(((Uint16)(n) & 0x0001u) << _VENC_REC656_VOUTHLD_SHIFT)
#define _VENC_REC656_VOUTHLD_MASK			(_VENC_REC656_VOUTHLD_MK(0x0001u))
#define _VENC_REC656_VOUTHLD_CLR			(~(_VENC_REC656_VOUTHLD_MASK))

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -