generale.syr

simple thermometr in vhdl

    Found 11-bit comparator less for signal <dot1$cmp_lt0001> created at line 61.
    Found 11-bit comparator less for signal <hs$cmp_lt0000> created at line 83.
    Found 11-bit comparator less for signal <hs$cmp_lt0001> created at line 57.
    Found 11-bit comparator lessequal for signal <rgb$cmp_le0000> created at line 64.
    Summary:
	inferred   2 Counter(s).
	inferred  18 D-type flip-flop(s).
	inferred   7 Comparator(s).
Unit <sinc_h> synthesized.


Synthesizing Unit <sinc_v>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/sinc_v.vhd".
    Found 9-bit up counter for signal <lin>.
    Found 1-bit register for signal <vs>.
    Found 1-bit register for signal <blan>.
    Found 11-bit comparator less for signal <blan$cmp_lt0000> created at line 48.
    Found 10-bit up counter for signal <count>.
    Found 11-bit comparator greatequal for signal <lin$cmp_ge0000> created at line 56.
    Found 11-bit comparator greatequal for signal <lin$cmp_ge0001> created at line 52.
    Found 11-bit comparator less for signal <lin$cmp_lt0000> created at line 56.
    Found 11-bit comparator less for signal <lin$cmp_lt0001> created at line 52.
    Found 11-bit comparator less for signal <vs$cmp_lt0000> created at line 60.
    Summary:
	inferred   2 Counter(s).
	inferred   2 D-type flip-flop(s).
	inferred   6 Comparator(s).
Unit <sinc_v> synthesized.


Synthesizing Unit <swap>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Swap.vhd".
Unit <swap> synthesized.


Synthesizing Unit <complemento2>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/complemento2.vhd".
WARNING:Xst:737 - Found 8-bit latch for signal <data_out>.
WARNING:Xst:737 - Found 8-bit latch for signal <data>.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
    Found 8-bit adder for signal <data_out$addsub0000> created at line 35.
    Summary:
	inferred   1 Adder/Subtractor(s).
Unit <complemento2> synthesized.


Synthesizing Unit <sincronismo>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Sincronismo.vhd".
    Found 4-bit register for signal <cfr1_out>.
    Found 4-bit register for signal <cfr2_out>.
    Found 4-bit register for signal <cfr3_out>.
    Summary:
	inferred  12 D-type flip-flop(s).
Unit <sincronismo> synthesized.


Synthesizing Unit <contatore21bit>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/contatore21bit.vhd".
    Found 21-bit up counter for signal <cont>.
    Summary:
	inferred   1 Counter(s).
Unit <contatore21bit> synthesized.


Synthesizing Unit <costante_dieci>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/costante_dieci.vhd".
Unit <costante_dieci> synthesized.


Synthesizing Unit <restoring_cell>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/divisore_base2.vhd".
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
    Found 5-bit subtractor for signal <subst>.
    Summary:
	inferred   1 Adder/Subtractor(s).
Unit <restoring_cell> synthesized.


Synthesizing Unit <SHReg_1>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/shreg.vhd".
    Found 8-bit register for signal <qt>.
    Summary:
	inferred   8 D-type flip-flop(s).
Unit <SHReg_1> synthesized.


Synthesizing Unit <SHReg_2>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/shreg.vhd".
    Found 8-bit register for signal <qt>.
    Summary:
	inferred   8 D-type flip-flop(s).
Unit <SHReg_2> synthesized.


Synthesizing Unit <JCounter_1>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/jcounter.vhd".
    Found 2-bit register for signal <qi>.
    Summary:
	inferred   2 D-type flip-flop(s).
Unit <JCounter_1> synthesized.


Synthesizing Unit <JCounter_2>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/jcounter.vhd".
    Found 10-bit register for signal <qi>.
    Summary:
	inferred  10 D-type flip-flop(s).
Unit <JCounter_2> synthesized.


Synthesizing Unit <BitReg>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/bitreg.vhd".
    Found 8-bit register for signal <dout>.
    Summary:
	inferred   8 D-type flip-flop(s).
Unit <BitReg> synthesized.


Synthesizing Unit <ByteReg>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/bytereg.vhd".
    Found 48-bit register for signal <dout>.
    Summary:
	inferred  48 D-type flip-flop(s).
Unit <ByteReg> synthesized.


Synthesizing Unit <FTC_MXILINX_generale>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Generale.vhf".
Unit <FTC_MXILINX_generale> synthesized.


Synthesizing Unit <caratteri>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Caratteri.vhf".
Unit <caratteri> synthesized.


Synthesizing Unit <vga>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/VGA.vhf".
Unit <vga> synthesized.


Synthesizing Unit <div_rest_nat>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/divisore_base2.vhd".
WARNING:Xst:646 - Signal <wires_out<0><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<1><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<2><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<3><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<4><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<5><4>> is assigned but never used.
WARNING:Xst:646 - Signal <wires_out<6><4>> is assigned but never used.
Unit <div_rest_nat> synthesized.


Synthesizing Unit <clk_divider>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/clk_div.vhd".
WARNING:Xst:646 - Signal <tmp> is assigned but never used.
    Found 1-bit register for signal <clk_gen>.
    Summary:
	inferred   1 D-type flip-flop(s).
Unit <clk_divider> synthesized.


Synthesizing Unit <onewire_master>.
    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/onewire_master.vhd".
WARNING:Xst:646 - Signal <jc2_q<8:5>> is assigned but never used.
WARNING:Xst:646 - Signal <jc2_q<2:1>> is assigned but never used.
WARNING:Xst:1780 - Signal <crcreg_en> is never used or assigned.
WARNING:Xst:646 - Signal <gnd> is assigned but never used.
WARNING:Xst:1780 - Signal <crcvalue_i> is never used or assigned.
WARNING:Xst:737 - Found 1-bit latch for signal <conv_ok>.
    Using one-hot encoding for signal <thisState>.
INFO:Xst:2117 - HDL ADVISOR - Mux Selector <thisState> of Case statement line 691 was re-encoded using one-hot encoding. The case statement will be optimized (default statement optimization), but this optimization may lead to design initialization problems. To ensure the design works safely, you can:
   	- add an 'INIT' attribute on signal <thisState> (optimization is then done without any risk)
   	- use the attribute 'signal_enc