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📄 generale.syr

📁 simple thermometr in vhdl
💻 SYR
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Performing bidirectional port resolution...Synthesizing Unit <pos_sel>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Seleziona_posizione.vhd".    Found 10-bit register for signal <fine>.    Found 4-bit register for signal <cifra>.    Found 10-bit register for signal <inizio>.    Found 10-bit comparator greater for signal <cifra$cmp_gt0000> created at line 114.    Found 10-bit comparator greater for signal <fine$cmp_gt0000> created at line 122.    Found 10-bit comparator greater for signal <fine$cmp_gt0001> created at line 48.    Found 10-bit comparator greater for signal <fine$cmp_gt0002> created at line 61.    Found 10-bit comparator greater for signal <fine$cmp_gt0003> created at line 74.    Found 10-bit comparator greater for signal <fine$cmp_gt0004> created at line 86.    Found 10-bit comparator greater for signal <fine$cmp_gt0005> created at line 94.    Found 10-bit comparator greater for signal <fine$cmp_gt0006> created at line 102.    Found 10-bit comparator less for signal <fine$cmp_lt0000> created at line 48.    Found 10-bit comparator less for signal <fine$cmp_lt0001> created at line 61.    Found 10-bit comparator less for signal <fine$cmp_lt0002> created at line 74.    Found 10-bit comparator less for signal <fine$cmp_lt0003> created at line 86.    Found 10-bit comparator less for signal <fine$cmp_lt0004> created at line 94.    Found 10-bit comparator less for signal <fine$cmp_lt0005> created at line 102.    Found 10-bit comparator less for signal <inizio$cmp_lt0000> created at line 114.    Found 10-bit comparator less for signal <inizio$cmp_lt0001> created at line 39.    Summary:	inferred  24 D-type flip-flop(s).	inferred  16 Comparator(s).Unit <pos_sel> synthesized.Synthesizing Unit <devet>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/nove.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <devet> synthesized.Synthesizing Unit <dva>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/due.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <dva> synthesized.Synthesizing Unit <ena>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/uno.vhd".    Found 19-bit register for signal <D_OUT>.    Summary:	inferred  19 D-type flip-flop(s).Unit <ena> synthesized.Synthesizing Unit <tri>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/tre.vhd".    Found 27-bit register for signal <D_OUT>.    Summary:	inferred  27 D-type flip-flop(s).Unit <tri> synthesized.Synthesizing Unit <stiri>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/quattro.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <stiri> synthesized.Synthesizing Unit <pet>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/cinque.vhd".    Found 27-bit register for signal <D_OUT>.    Summary:	inferred  27 D-type flip-flop(s).Unit <pet> synthesized.Synthesizing Unit <sest>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/sei.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <sest> synthesized.Synthesizing Unit <sedem>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/sette.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <sedem> synthesized.Synthesizing Unit <osem>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/otto.vhd".    Found 28-bit register for signal <D_OUT>.    Summary:	inferred  28 D-type flip-flop(s).Unit <osem> synthesized.Synthesizing Unit <nic>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/zero.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <nic> synthesized.Synthesizing Unit <selettor>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Selettore.vhd".    Found 34-bit register for signal <st_out>.    Found 34-bit 16-to-1 multiplexer for signal <st_out$mux0001> created at line 43.    Summary:	inferred  34 D-type flip-flop(s).	inferred  34 Multiplexer(s).Unit <selettor> synthesized.Synthesizing Unit <meno>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/meno.vhd".    Found 19-bit register for signal <D_OUT>.    Summary:	inferred  19 D-type flip-flop(s).Unit <meno> synthesized.Synthesizing Unit <punto>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Punto.vhd".    Found 16x8-bit ROM for signal <D_OUT$mux0002>.    Found 8-bit register for signal <D_OUT>.    Summary:	inferred   1 ROM(s).	inferred   8 D-type flip-flop(s).Unit <punto> synthesized.Synthesizing Unit <gradi>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Gradi.vhd".    Found 30-bit register for signal <D_OUT>.    Summary:	inferred  30 D-type flip-flop(s).Unit <gradi> synthesized.Synthesizing Unit <scrittura_seriale>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/Scrittura_seriale.vhd".WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.    Found 1-bit register for signal <pixel>.    Found 11-bit subtractor for signal <data$addsub0000> created at line 35.    Found 1-bit 34-to-1 multiplexer for signal <data$mux0000> created at line 35.    Found 11-bit subtractor for signal <pixel$addsub0000> created at line 35.    Found 11-bit comparator greater for signal <pixel$cmp_gt0000> created at line 35.    Found 10-bit comparator less for signal <pixel$cmp_lt0000> created at line 35.    Summary:	inferred   1 D-type flip-flop(s).	inferred   2 Adder/Subtractor(s).	inferred   2 Comparator(s).	inferred   1 Multiplexer(s).Unit <scrittura_seriale> synthesized.Synthesizing Unit <sinc_h>.    Related source file is "C:/Documents and Settings/Jernej/Desktop/Termometro_visualizzato_su_VGA_vers.ISE_9.2i/VGAterm/sinc_H.vhd".    Found 1-bit register for signal <hs>.    Found 1-bit register for signal <end_l>.    Found 10-bit register for signal <dot1>.    Found 6-bit register for signal <rgb>.    Found 10-bit up counter for signal <count>.    Found 10-bit up counter for signal <dot>.    Found 11-bit comparator greatequal for signal <dot1$cmp_ge0000> created at line 78.    Found 11-bit comparator greatequal for signal <dot1$cmp_ge0001> created at line 61.    Found 11-bit comparator less for signal <dot1$cmp_lt0000> created at line 78.

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