contatore21bit.vhd

simple thermometr in vhdl

----------------------------------------------------------------------------------
-- Bufon, Ferluga
-- Progetto elettronica 2 FPGA
-- Termometro visualizzato su VGA
----------------------------------------------------------------------------------

--blocco contatore a 21 bit

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity contatore21bit is
    Port ( clock : in  STD_LOGIC;
	        reset : in std_logic;
           cont : inout  STD_LOGIC_VECTOR (20 downto 0));
end contatore21bit;

architecture Behavioral of contatore21bit is

begin

process (clock, reset) 
   begin
   if reset='1' then 
      cont <= "000000000000000000000";
   elsif clock='1' and clock'event then
      cont <= cont + 1;
   end if;
end process;

end Behavioral;