quattro.vhd

来自「simple thermometr in vhdl」· VHDL 代码 · 共 89 行

----------------------------------------------------------------------------------
-- Bufon, Ferluga
-- Progetto elettronica 2 FPGA
-- Termometro visualizzato su VGA
----------------------------------------------------------------------------------

-- Tabella del numero 4
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--Dichiarazione variabili d'ingresso e di uscita:

entity stiri is
    Port ( clk : in  STD_LOGIC;
           add_linea : in  STD_LOGIC_VECTOR (8 downto 0);
           D_OUT : out  STD_LOGIC_VECTOR (29 downto 0));
end stiri;

architecture Behavioral of stiri is

begin
process(clk,add_linea)
begin

if ( clk'event and clk ='1') then
   case add_linea is

when "011011000" => D_OUT <= "000000000000000000001111100000";
when "011011001" => D_OUT <= "000000000000000000011111100000";
when "011011010" => D_OUT <= "000000000000000000011111100000";
when "011011011" => D_OUT <= "000000000000000000111111100000";
when "011011100" => D_OUT <= "000000000000000001111111100000";
when "011011101" => D_OUT <= "000000000000000001111111100000";
when "011011110" => D_OUT <= "000000000000000011111111100000";
when "011011111" => D_OUT <= "000000000000000011111111100000";
when "011100000" => D_OUT <= "000000000000000110111111100000";
when "011100001" => D_OUT <= "000000000000001110111111100000";
when "011100010" => D_OUT <= "000000000000001100111111100000";
when "011100011" => D_OUT <= "000000000000011000111111100000";
when "011100100" => D_OUT <= "000000000000111000111111100000";
when "011100101" => D_OUT <= "000000000000110000111111100000";
when "011100110" => D_OUT <= "000000000001110000111111100000";
when "011100111" => D_OUT <= "000000000001100000111111100000";
when "011101000" => D_OUT <= "000000000011000000111111100000";
when "011101001" => D_OUT <= "000000000111000000111111100000";
when "011101010" => D_OUT <= "000000000110000000111111100000";
when "011101011" => D_OUT <= "000000001100000000111111100000";
when "011101100" => D_OUT <= "000000011100000000111111100000";
when "011101101" => D_OUT <= "000000011000000000111111100000";
when "011101110" => D_OUT <= "000000111000000000111111100000";
when "011101111" => D_OUT <= "000000110000000000111111100000";
when "011110000" => D_OUT <= "000001100000000000111111100000";
when "011110001" => D_OUT <= "000011100000000000111111100000";
when "011110010" => D_OUT <= "000011000000000000111111100000";
when "011110011" => D_OUT <= "000110000000000000111111100000";
when "011110100" => D_OUT <= "001110000000000000111111100000";
when "011110101" => D_OUT <= "001100000000000000111111100000";
when "011110110" => D_OUT <= "011100000000000000111111100000";
when "011110111" => D_OUT <= "011000000000000000111111100000";
when "011111000" => D_OUT <= "111111111111111111111111111111";
when "011111001" => D_OUT <= "111111111111111111111111111111";
when "011111010" => D_OUT <= "111111111111111111111111111111";
when "011111011" => D_OUT <= "111111111111111111111111111111";
when "011111100" => D_OUT <= "000000000000000000111111100000";
when "011111101" => D_OUT <= "000000000000000000111111100000";
when "011111110" => D_OUT <= "000000000000000000111111100000";
when "011111111" => D_OUT <= "000000000000000000111111100000";
when "100000000" => D_OUT <= "000000000000000000111111100000";
when "100000001" => D_OUT <= "000000000000000000111111100000";
when "100000010" => D_OUT <= "000000000000000000111111100000";
when "100000011" => D_OUT <= "000000000000000000111111100000";
when "100000100" => D_OUT <= "000000000000000000111111100000";
when "100000101" => D_OUT <= "000000000000000000111111100000";
when "100000110" => D_OUT <= "000000000000000000111111100000";
when "100000111" => D_OUT <= "000000000000000000111111100000";
when "100001000" => D_OUT <= "000000000000000000111111100000";



	 when others => D_OUT <= "000000000000000000000000000000";
   end case;
end if;
end process;

end Behavioral;