punto.vhd

来自「simple thermometr in vhdl」· VHDL 代码 · 共 49 行

----------------------------------------------------------------------------------
-- Bufon, Ferluga
-- Progetto elettronica 2 FPGA
-- Termometro visualizzato su VGA
----------------------------------------------------------------------------------

-- Tabella del punto decimale
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--Dichiarazione variabili d'ingresso e di uscita:

entity punto is
    Port ( clk : in  STD_LOGIC;
           add_linea : in  STD_LOGIC_VECTOR (8 downto 0);
           D_OUT : out  STD_LOGIC_VECTOR (7 downto 0));
end punto;

architecture Behavioral of punto is

begin

process(clk,add_linea)
begin

if ( clk'event and clk ='1') then
   case add_linea is



when "100000001" => D_OUT <= "00111100";
when "100000010" => D_OUT <= "01111110";
when "100000011" => D_OUT <= "11111111";
when "100000100" => D_OUT <= "11111111";
when "100000101" => D_OUT <= "11111111";
when "100000110" => D_OUT <= "11111111";
when "100000111" => D_OUT <= "01111110";
when "100001000" => D_OUT <= "00111100";



	 when others => D_OUT <= "00000000";
   end case;
end if;
end process;

end Behavioral;