com.c

AT91SAM9263 code for I2C based ADC and DAC

#include "com.h"
#include "AT91SAM9260.h"

void COM_init();
void Set_PLL(void);
void Put_Char(unsigned int);
void Put_C(unsigned char);
void Put_S(unsigned char *buff);

void delay();

void delay()
{
	unsigned int i;
	for(i=0;i<=3333333;i++);
}

void Set_PLL(void)
{ unsigned int j;
///////////////////////////////////////////////////////////////////////////
    // Init PMC Step 1. Enable Main Oscillator
    // Main Oscillator startup time is board specific:
    // Main Oscillator Startup Time worst case (16MHz/20MHz) corresponds to 2ms
    // (0x08 for CKGR_OSCOUNT field)
    ///////////////////////////////////////////////////////////////////////////
   *PMC_MOR = ((((0xFF << 8) & (0x08 << 8)) | CKGR_MOSCEN));
   // Wait Main Oscillator stabilization
    while (!(*PMC_SR & 0x01));
	*PMC_MCKR = PMC_CSS_MAIN_CLK; 
    ///////////////////////////////////////////////////////////////////////////
    // Init PMC Step 2.
    // Set PLLA to 100MHz 
    // PLL Startup time depends on PLL RC filter: worst case is choosen
    ///////////////////////////////////////////////////////////////////////////
//	*PMC_PLLAR = (1<<29)|(0x18<<16)|(0x3F<<8)|(2<<14)|(4);	// PLLA - 100MHz 
//	*PMC_PLLAR = (1<<29)|(0x0B<<16)|(0x3F<<8)|(2<<14)|(4);	// PLLA - 48MHz 
//	*PMC_PLLAR = (1<<29)|(0x13<<16)|(0x3F<<8)|(2<<14)|(4);	// PLLA - 80MHz 
  *PMC_PLLAR = (1<<29)|(0x6F<<16)|(0x3F<<8)|(2<<14)|(9); // PLLA - 200MHz
   while (!(*PMC_SR & PMC_LOCKA));	// Wait for PLLA stabilization
   // Wait until the master clock is established for the case we already
    // turn on the PLLA
   while (!(*PMC_SR & PMC_MCKRDY));
    ///////////////////////////////////////////////////////////////////////////
    // Init PMC Step 3.
    // Selection of Master Clock MCK equal to Processor Clock PCK equals to PLLA clock = 100MHz
    // The PMC_MCKR register must not be programmed in a single write operation
    // (see. Product Errata Sheet)
    ///////////////////////////////////////////////////////////////////////////
//	*PMC_MCKR = 0x02; // PLLA 100M
//	*PMC_MCKR = 0x01;  // Main clk 16M
   *PMC_MCKR = (PMC_CSS_PLLA_CLK | PMC_PRES_CLK | PMC_MDIV_2);//PLLA 200MHz
   // Wait until the master clock is established
   while (!(*PMC_SR & PMC_MCKRDY));
 	for(j=0;j<10;j++)
	{
		*PIOA_SODR = 0x3F0000;
		delay();
		*PIOA_CODR = 0x3F0000;
		delay();
	}

 ///////////////////////////////////////////////////////////////////////////
    // Disable Watchdog
    ///////////////////////////////////////////////////////////////////////////
    *WDTC_WDMR = (1<<15);

}

void COM_init(void)
{
	// Switch to main ocilator

	
	*PMC_PCER = *PMC_PCER | 0x80;

	*PIOA_ASR = 0x0C000000;
	*PIOA_PDR = 0x0C000000;

/* Config COM */
	*US0_CR = *US0_CR | 0x000000AC;			/* Reset Receiver/Tr */
	*US0_MR = 0x000208C0;
//	*US0_BRGR = 52;				/* for 100MHz PLLA Receiver 16 bit sampling */
//	*US0_BRGR = 52;				/* for 100MHz PLLA Receiver 16 bit sampling */
	*US0_BRGR = 50;				/* for 200MHz PLLA Receiver 16 bit sampling */
//	*US0_BRGR = 0x8;			/* for 16MHz main clk Receiver 16 bit sampling */
//	*US0_BRGR = 0x1A;			/* for 48MHz main clk Receiver 16 bit sampling */

	*US0_CR = *US0_CR | 0x00000050;			/* Enable Tx/Receiver */
}

void Put_Char(unsigned int value)
{
	int i;
	unsigned int ID, NUM;
	ID = value;	
	for(i=0;i<8;i++)
	{
		NUM = (ID & 0xF0000000) >> 28;	
		if(NUM >= 0x0A)
			NUM = NUM + 0x37;
		else
			NUM = NUM + 0x30;
		if(NUM>0x40)
			NUM=NUM+0x40;
		*US0_THR = NUM;
		while(!(*US0_CSR & 0x02));
		ID = ID << 4;
	}

	*US0_THR = 0x20;
	while(!(*US0_CSR & 0x02));

	*US0_THR = 0x20;
	while(!(*US0_CSR & 0x02));	
}


void Put_C(unsigned char val)
{
	if(val>0x40)
		val=val+0x40;
	while(!(*US0_CSR & 0x02));
	*US0_THR = val  ;
	while(!(*US0_CSR & 0x02));	
}

void Put_S(unsigned char *buff)
{
	while(*buff)
	{
		Put_C(*buff);
		buff++;
	}
}