i2c_adc_dac.c

AT91SAM9263 code for I2C based ADC and DAC

/************************************************************************************
** 
** Version Control Information:
**  
**  $Header: keypad_main.c$
**  $Version: 1.0$
**  $Last modified: NOvember 28, 2006 $
**  $Description:  Code for interfacing the thermal printer,4x4 keypad(new board) and  lcd screen for 
**                 printing which key ressed from the keypad.
*/
/***********************************************************
 * program for interfacing GSM with taures board also interfacing 3x3
 * matrix key pad and LCD display.
 * for keypad port pin PA4-7 used
 * for LCD port pin PB0-9 from GPIO connector
 * 
 * *************************************************/
 #include "AT91SAM9263.h"

#define  no		 	0x00 
#define  yes        0x01


#define DEVICE_ADD  (0x50 << 16)
#define WRITE_MODE  (0xFFFFEFFF)
#define READ_MODE	(0x00001000)
#define START 		(0x1)
#define STOP 		(0x2)
#define MSTR_EN 	(0x4)
#define SLV_DIS 	(0x20)
#define ACK_WAIT 	(0x1 << 8)
#define ST_TXCOMP 	(0x01)
#define ST_TXRDY		(0x04)
#define ST_RXRDY		(0x02)
#define SW_RESET		(0x80)
#define SLV_DIS		(0x20)
#define TXRDY		(0x04)

#define MREAD		(0x1000)
#define IADR_1BYT	(0x100)


//8*************************************************************
// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
#define AT91C_TWI_START       (0x1 <<  0) // (TWI) Send a START Condition
#define AT91C_TWI_STOP        (0x1 <<  1) // (TWI) Send a STOP Condition
#define AT91C_TWI_MSEN        (0x1 <<  2) // (TWI) TWI Master Transfer Enabled
#define AT91C_TWI_MSDIS       (0x1 <<  3) // (TWI) TWI Master Transfer Disabled
#define AT91C_TWI_SVEN        (0x1 <<  4) // (TWI) TWI Slave mode Enabled
#define AT91C_TWI_SVDIS       (0x1 <<  5) // (TWI) TWI Slave mode Disabled
#define AT91C_TWI_SWRST       (0x1 <<  7) // (TWI) Software Reset
// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
#define AT91C_TWI_IADRSZ      (0x3 <<  8) // (TWI) Internal Device Address Size
#define 	AT91C_TWI_IADRSZ_NO                   (0x0 <<  8) // (TWI) No internal device address
#define 	AT91C_TWI_IADRSZ_1_BYTE               (0x1 <<  8) // (TWI) One-byte internal device address
#define 	AT91C_TWI_IADRSZ_2_BYTE               (0x2 <<  8) // (TWI) Two-byte internal device address
#define 	AT91C_TWI_IADRSZ_3_BYTE               (0x3 <<  8) // (TWI) Three-byte internal device address
#define AT91C_TWI_MREAD       (0x1 << 12) // (TWI) Master Read Direction
#define AT91C_TWI_DADR        (0x7F << 16) // (TWI) Device Address
// -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register -------- 
#define AT91C_TWI_SADR        (0x7F << 16) // (TWI) Slave Address
// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
#define AT91C_TWI_CLDIV       (0xFF <<  0) // (TWI) Clock Low Divider
#define AT91C_TWI_CHDIV       (0xFF <<  8) // (TWI) Clock High Divider
#define AT91C_TWI_CKDIV       (0x7 << 16) // (TWI) Clock Divider
// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
#define AT91C_TWI_TXCOMP (0x1 <<  0) // (TWI) Transmission Completed
#define AT91C_TWI_TXCOMP_MASTER (0x1 <<  0) // (TWI) Transmission Completed
#define AT91C_TWI_RXRDY       (0x1 <<  1) // (TWI) Receive holding register ReaDY
#define AT91C_TWI_TXRDY_MASTER (0x1 <<  2) // (TWI) Transmit holding register ReaDY
#define AT91C_TWI_TXRDY (0x1 <<  2) // (TWI) Transmit holding register ReaDY

void I2C_init(void);
void put_c(unsigned char );
void  print_str(char *str, int len);

void TWI_Configure();
void TWI_Stop();
void TWI_StartRead(
    unsigned char ,
    unsigned int ,
    unsigned char );
unsigned char TWI_ReadByte();
void TWI_WriteByte( unsigned char);
void TWI_StartWrite(
    unsigned char ,
    unsigned int ,
    unsigned char , // addres byte length
    unsigned char );
unsigned char TWI_ByteReceived()      ;
unsigned char TWI_ByteSent();
unsigned char TWI_TransferComplete();


unsigned char TWID_Read(
    unsigned char ,
    unsigned int ,
    unsigned char ,
    unsigned char *,
    unsigned int );


unsigned char TWID_Write(
    unsigned char ,
    unsigned int ,
    unsigned char ,
    unsigned char *,
    unsigned int );


    
unsigned char TxData[5];
unsigned char RxData[5];
unsigned char data1;
unsigned char data2;

int main()
{
unsigned int count;
unsigned int data;
unsigned int i=1;
unsigned short mem_addr;

I2C_init();
TWI_Configure();
TxData[0]=0x1;
TxData[1]=0x2;
TxData[2]=0x3;
TxData[3]=0x4;
TxData[4]=0x5;
while(1)
{
	//===================================================
	
print_str("\r\n*****1 I2C-ADC/DAC! *****\r\n",28);
for(i = 0; i < 400000; i++);


	print_str("\n\rwrite",7);
	TWID_Write(
    0x50,//eprom
   // 0x98,//dac
    0x10,
    0x01,
    TxData,
    0x05
    );
    for(i = 0; i < 400000; i++);
    
    
    
    print_str("\n\r read",7);
    TWID_Read(
    0x50,//eprom
    //0x98,//dac
    0x10,
    0x01,
    RxData,
    0x05);
    
for(i=0;i<5;i++)
{
	print_str("\n\rdata[",7);
	put_c(i+0x30);
	print_str("]=>",3);
	put_c(RxData[i]+0x30);
	print_str("\r\n",2);
}

}

}

void I2C_init()
{
	*PMC_PCER = *PMC_PCER | 0x80;
	*PIOC_ASR = 0xC0000000;    //com1 DBGU
    *PIOC_PDR = 0xC0000000;
    *PIOA_ASR = 0x0C000000;    // com2 US0
    *PIOA_PDR = 0x0C000000;
	*DBGU_CR = *DBGU_CR | 0x000000AC;               /* Reset Receiver/Tr */
    *DBGU_MR = 0x000208C0;
    *DBGU_BRGR = 27;                         	/*115200 for 100MHz PLLA Receiver 16 bit sampling */
	//*DBGU_BRGR = 325;                         	/*9600 for 100MHz PLLA Receiver 16 bit sampling */
	//*DBGU_BRGR = 81;
	*DBGU_CR = *DBGU_CR | 0x00000050;                 /* Enable Tx/Receiver */
	
	*PIOB_ASR = 0x00000030; 	// Select PB4-PB5 as TWI lines
	*PIOB_PDR = 0x00000030;    // Disable PB4-PB5 as GPIO lines
	*PIOB_PUDR = 0xFFFFFFFF;   // Disable INTERNAL PULL_UPS
	*PIOB_MDER = 0x0;		   // disable multi-driver on lines
	*PMC_PCER |= 0x0000200C;	// Enable CLOCK for TWI 
	*TWI_CR = SW_RESET;			// Software reset for TWI
	*TWI_IDR = 0x0FFF;		//Disable Interrupts
	*TWI_CR |= 0x20;		//Slave disable
	//*TWI_CR |= MSTR_EN;			// Set TWI in MASTER mode
	
//	*TWI_CWGR = ((240) | (240 << 8) | (5 << 16)); //  Set Serial clock 
//	*TWI_CWGR = (7<<16)|(255<<8)|(255); // CKDIV | CHDIV | CLDIV =111 1111 1111
//*TWI_CWGR = ((61) | (61 << 8) | (1 << 16));
// set dev.adr to 7-bits, adr.space to 16-bits:
	*TWI_MMR = 0x550200;
}

void put_c(unsigned char val)
{
	*DBGU_THR = val;
	while(!(*DBGU_SR & 0x02));
}

void  print_str(char *str, int len)
{
	while(len-- != 0)
	{
		put_c(*str);
		str++;
		
	}
	*DBGU_THR = 0x20;
	while(!(*DBGU_SR & 0x02));
}

void TWI_Configure()
{
    unsigned int ckdiv = 0;
    unsigned int cldiv;
    unsigned char ok = 0;
	unsigned int temp;
    
    cldiv =255;
   // cldiv =248;
    //cldiv =61;
    ckdiv=1;
   *TWI_CWGR = (ckdiv << 16) | (cldiv << 8) | cldiv;
}

void TWI_Stop()
{
    *TWI_CR = AT91C_TWI_STOP;
}

void TWI_StartRead(
    unsigned char address,
    unsigned int iaddress,
    unsigned char isize)// address length
{
    // Set slave address and number of internal address bytes
    *TWI_MMR = (isize << 8) | AT91C_TWI_MREAD | (address << 16);

    // Set internal address bytes
    *TWI_IADR = iaddress;

    // Send START condition
    *TWI_CR = AT91C_TWI_START;
}

unsigned char TWI_ReadByte()
{

    return *TWI_RHR;
}

void TWI_WriteByte( unsigned char byte)
{
    *TWI_THR = byte;
}

void TWI_StartWrite(
    unsigned char address,
    unsigned int iaddress,
    unsigned char isize, // addres byte length
    unsigned char byte)
{
   
    // Set slave address and number of internal address bytes
    *TWI_MMR = (isize << 8) | (address << 16);

    // Set internal address bytes
    *TWI_IADR = iaddress;

    // Write first byte to send
    TWI_WriteByte( byte);
}

unsigned char TWI_ByteReceived()
{
    return ((*TWI_SR & AT91C_TWI_RXRDY) == AT91C_TWI_RXRDY);
}

unsigned char TWI_ByteSent()
{
    return ((*TWI_SR & AT91C_TWI_TXRDY) == AT91C_TWI_TXRDY);
}

unsigned char TWI_TransferComplete()
{
    return ((*TWI_SR & AT91C_TWI_TXCOMP) == AT91C_TWI_TXCOMP);
}

unsigned char TWID_Read(
    unsigned char address,
    unsigned int iaddress,
    unsigned char isize,
    unsigned char *pData,
    unsigned int num)
{
		unsigned int i;
	unsigned int status;

	//*TWI_CR = SLV_DIS | MSTR_EN ;

	*TWI_MMR |= ( 0x00001000 | (address<<16) );
	//*TWI_MMR |= ( 0x00001100 | (dev_adr<<16) );
	
	*TWI_IADR = iaddress;
	*TWI_CR = START ;
	
	while (num > 0) {
        if (num == 1) {
         	//888888888888888888888888
         	  // TWI_Stop();
         	  *TWI_CR = AT91C_TWI_STOP;
         	  //888888888888888888888888888888
         }
          // Wait for byte then read and store it
          //8888888888888888888888888888888888888888
          while (!TWI_ByteReceived());
          //while (!((*TWI_SR & AT91C_TWI_RXRDY) == AT91C_TWI_RXRDY));
         // temp=TWI_ReadByte();
          *pData++ = TWI_ReadByte();			
            num--;
        }
        while(!((*TWI_SR & AT91C_TWI_TXCOMP) == AT91C_TWI_TXCOMP));
        

    return 0;
}

unsigned char TWID_Write(
    unsigned char address,
    unsigned int iaddress,
    unsigned char isize,
    unsigned char *pData,
    unsigned int num)
{
	unsigned int status;

	*TWI_IADR = iaddress;

	*TWI_MMR &= ( 0xFF00EFFF | (address<<16) );

	*TWI_CR = START | MSTR_EN | STOP;


//	*TWI_THR = 0x05;
	while (num > 0) 
	{   
		*TWI_THR = *pData++;

		status = *TWI_SR;
		while ( !(status & ST_TXRDY) )
		{
			status = *TWI_SR;
		}
		num--;
	}

	while ( !(status & ST_TXCOMP) )
	{
		status = *TWI_SR;
	}
	  
    return 0;
}