startup.s

来自「AT91SAM9263 code for I2C based ADC and 」· S 代码 · 共 126 行

.TEXT
.CODE 32

/*.extern  UART_INIT
.extern PLL_INIT
.extern SEND32*/
.extern main
.global START

B START
NOP
NOP
NOP
NOP
NOP
LDR PC,[PC,#-0XF20]
NOP


START:

/*-------FOR ABORT MODE---------*/

	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x017
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x00200690


/*------------FOR FIQ MODE---------*/

	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x011
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x00200540


/*------------FOR IRQ MODE---------*/

	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x012
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x002003F0



/*------------FOR UNDEFINED MODE---------*/

	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x01B
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x002002A0

/*------------FOR SYSTEM MODE---------*/

	
	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x01F
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x00200150

/*------------FOR SUPERVISOR MODE---------*/

	MRS R2,CPSR
	LDR R3,=0x002007E0
	AND R2,R2,R3
	LDR R3,=0x013
	ORR R2,R2,R3
	MSR CPSR,R2
	LDR SP,=0x00200000

DATA_SEG:
	LDR R1,=__data_beg__
	LDR R2,=__data_end__	
	SUB R3,R2,R1
	LDR R4,=__end_of_text__
	CMP R3, #0
	BEQ BSS_SEG
CHECK:
	LDR R5,[R4],#4 
	STR R5,[R1],#4
	SUB R3,R3,#4
	CMP R3,#0
	BNE CHECK

BSS_SEG:
	LDR R1,=__bss_beg__
	LDR R2,=__bss_end__	
	SUB R3,R2,R1
	CMP R3,#0
	BEQ MAIN
	
FILL:
	LDR R4,=0X00
	STR R4,[R1],#4
	SUB R3,R3,#4
	CMP R3,#0
	BNE FILL

	

MAIN:	

B main