rom16_1.v

来自「2dpsk,maxplus软件,包含连接原理图各个模块程序代码,可运行,管脚已经」· Verilog 代码 · 共 24 行

module rom16_1 (
	address,
	inclock,
	q);

	input	[3:0]  address;
	input	  inclock;
	output	[7:0]  q;

	lpm_rom	lpm_rom_component (
				.address (address),
				.inclock (inclock),
				.q(q)    );
	defparam
		lpm_rom_component.lpm_width = 8,
		lpm_rom_component.lpm_widthad = 4,
		lpm_rom_component.lpm_address_control = "REGISTERED",
		lpm_rom_component.lpm_outdata = "UNREGISTERED",
		lpm_rom_component.lpm_file = "sin16.mif";


endmodule