picoblaze_real_time_clock.vhd

PicoBlaze_Real_Time_Clock

--
-- Reference design - Real Time Clock and Calendar
--
-- Modified By George Wang.
--
-- The design is based on 's2esk_startup' (the initial design for Spartan-3E 
-- Starter Kit when delivered) by Ken Chapman.
--
-- George Wang - June 2006
--
--
------------------------------------------------------------------------------------
--
-- NOTICE (from original design picoblaze_real_time_clock provided by Xilinx)
--
-- Copyright Xilinx, Inc. 2006.   This code may be contain portions patented by other 
-- third parties.  By providing this core as one possible implementation of a standard,
-- Xilinx is making no representation that the provided implementation of this standard 
-- is free from any claims of infringement by any third party.  Xilinx expressly 
-- disclaims any warranty with respect to the adequacy of the implementation, including 
-- but not limited to any warranty or representation that the implementation is free 
-- from claims of any third party.  Furthermore, Xilinx is providing this core as a 
-- courtesy to you and suggests that you contact all third parties to obtain the 
-- necessary rights to use this implementation.
--
------------------------------------------------------------------------------------
--
-- Library declarations
--
-- Standard IEEE libraries
--
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
--
------------------------------------------------------------------------------------
--
--
entity picoblaze_real_time_clock is
    Port (             led : out std_logic_vector(7 downto 0);
            strataflash_oe : out std_logic;
            strataflash_ce : out std_logic;
            strataflash_we : out std_logic;
                    switch : in std_logic_vector(3 downto 0);
                 btn_north : in std_logic;
                  btn_east : in std_logic;
                 btn_south : in std_logic;
                  btn_west : in std_logic;
                     lcd_d : inout std_logic_vector(7 downto 4);
                    lcd_rs : out std_logic;
                    lcd_rw : out std_logic;
                     lcd_e : out std_logic;
                  rotary_a : in std_logic;
                  rotary_b : in std_logic;
              rotary_press : in std_logic;
                       clk : in std_logic);
    end picoblaze_real_time_clock;
--
------------------------------------------------------------------------------------
--
-- Start of test architecture
--
architecture Behavioral of picoblaze_real_time_clock is
--
------------------------------------------------------------------------------------
--
-- declaration of KCPSM3
--
  component kcpsm3 
    Port (      address : out std_logic_vector(9 downto 0);
            instruction : in std_logic_vector(17 downto 0);
                port_id : out std_logic_vector(7 downto 0);
           write_strobe : out std_logic;
               out_port : out std_logic_vector(7 downto 0);
            read_strobe : out std_logic;
                in_port : in std_logic_vector(7 downto 0);
              interrupt : in std_logic;
          interrupt_ack : out std_logic;
                  reset : in std_logic;
                    clk : in std_logic);
    end component;
--
-- declaration of program ROM
--
  component control
    Port (      address : in std_logic_vector(9 downto 0);
            instruction : out std_logic_vector(17 downto 0);
  --           proc_reset : out std_logic;                       --JTAG Loader version
                    clk : in std_logic);
    end component;

--
------------------------------------------------------------------------------------
--
-- Signals used to connect KCPSM3 to program ROM and I/O logic
--
signal address          : std_logic_vector(9 downto 0);
signal instruction      : std_logic_vector(17 downto 0);
signal port_id          : std_logic_vector(7 downto 0);
signal out_port         : std_logic_vector(7 downto 0);
signal in_port          : std_logic_vector(7 downto 0);
signal write_strobe     : std_logic;
signal read_strobe      : std_logic;
signal interrupt        : std_logic :='0';
signal interrupt_ack    : std_logic;
signal kcpsm3_reset     : std_logic;
--
--
-- Signals for LCD operation
--
-- Tri-state output requires internal signals
-- 'lcd_drive' is used to differentiate between LCD and StrataFLASH communications 
-- which share the same data bits.
--
signal   lcd_rw_control : std_logic;
signal  lcd_output_data : std_logic_vector(7 downto 4);
signal        lcd_drive : std_logic;
--
--
-- Signals used to interface to rotary encoder
--
signal      rotary_a_in : std_logic;
signal      rotary_b_in : std_logic;
signal  rotary_press_in : std_logic;
signal        rotary_in : std_logic_vector(1 downto 0);
signal        rotary_q1 : std_logic;
signal        rotary_q2 : std_logic;
signal  delay_rotary_q1 : std_logic;
signal     rotary_event : std_logic;
signal      rotary_left : std_logic;

signal ck1us:std_logic;
signal ck50us:std_logic;
signal ck2_5ms:std_logic;
signal ck62_5ms:std_logic;
signal ck1s:std_logic;
signal ck_tmp:std_logic;
signal ck_flag:std_logic;
signal rotary_tmp:std_logic;
signal rotary_flag:std_logic;
signal ck25m_cnt:std_logic_vector(1 downto 0);
signal ck25m:std_logic;
signal cnt1us:std_logic_vector (5 downto 0);
signal cnt50us:std_logic_vector (5 downto 0);
signal cnt2_5ms:std_logic_vector (5 downto 0);
signal cnt62_5ms:std_logic_vector (4 downto 0);
signal cnt1s:std_logic_vector (8 downto 0);
signal port_id1          : std_logic_vector(7 downto 0);

--
--
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
--
-- Start of circuit description
--
begin
  --
  ----------------------------------------------------------------------------------------------------------------------------------
  -- Disable unused components  
  ----------------------------------------------------------------------------------------------------------------------------------
  --
  --StrataFLASH must be disabled to prevent it conflicting with the LCD display 
  --
  strataflash_oe <= '1';
  strataflash_ce <= '1';
  strataflash_we <= '1';
  --
  --
  ----------------------------------------------------------------------------------------------------------------------------------
  -- KCPSM3 and the program memory 
  ----------------------------------------------------------------------------------------------------------------------------------
  --

  processor: kcpsm3
    port map(      address => address,
               instruction => instruction,
                   port_id => port_id,
              write_strobe => write_strobe,
                  out_port => out_port,
               read_strobe => read_strobe,
                   in_port => in_port,
                 interrupt => interrupt,
             interrupt_ack => interrupt_ack,
                     reset => kcpsm3_reset,
                       clk => clk);
 
  program_rom: control
    port map(      address => address,
               instruction => instruction,
--                proc_reset => kcpsm3_reset,                       --JTAG Loader version 
                       clk => clk);

kcpsm3_reset <= '0'; --When using normal program ROM


ck_25m: process(clk)
  begin
if clk'event and clk='1' then
	 ck25m_cnt<=ck25m_cnt+1;
end if;
  end process ck_25m;
  
rd: process(read_strobe)
  begin
if  read_strobe='1' then
	 port_id1<=port_id;
end if;
  end process rd;
  
  ck25m<=ck25m_cnt(1);
  

ck_1us: process(clk)
  begin
if clk'event and clk='1' then
	 if cnt1us="110001" then cnt1us<="000000";--0--49
	 else
    cnt1us<=cnt1us+1;
	 end if;
	 if cnt1us<"011000" then ck1us<='0';---0--24/25--49
	 else
    ck1us<='1';
	 end if;
end if;
  end process ck_1us;

ck_50us: process(ck1us)
  begin
if ck1us'event and ck1us='1' then
	 if cnt50us="110001" then cnt50us<="000000";--0--49
	 else
    cnt50us<=cnt50us+1;
	 end if;
	 if cnt50us<"011000" then ck50us<='0';---0--24/25--49
	 else
    ck50us<='1';
	 end if;
end if;
  end process ck_50us;

ck_2_5ms: process(ck50us)
  begin
if ck50us'event and ck50us='1' then
	 if cnt2_5ms="110001" then cnt2_5ms<="000000";--0--49
	 else
    cnt2_5ms<=cnt2_5ms+1;
	 end if;
end if;
end process ck_2_5ms;

process(clk)
begin