prev_cmp_test.qmsg

DES加密算法的VHDL实现,采用流水线技术实现

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Aug 05 19:12:04 2007 " "Info: Processing started: Sun Aug 05 19:12:04 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off test -c test " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off test -c test" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "test.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file test.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 test-arch_test " "Info: Found design unit 1: test-arch_test" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 test " "Info: Found entity 1: test" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "test " "Info: Elaborating entity \"test\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "2 " "Warning: Design contains 2 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "rs\[47\] " "Warning: No output dependent on input pin \"rs\[47\]\"" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } }  } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "rs\[42\] " "Warning: No output dependent on input pin \"rs\[42\]\"" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } }  } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "24 " "Info: Implemented 24 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "6 " "Info: Implemented 6 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "4 " "Info: Implemented 4 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "4 " "Info: Implemented 4 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "148 " "Info: Allocated 148 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Aug 05 19:12:06 2007 " "Info: Processing ended: Sun Aug 05 19:12:06 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Aug 05 19:12:07 2007 " "Info: Processing started: Sun Aug 05 19:12:07 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off test -c test " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off test -c test" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "test EP3SL50F484C2 " "Info: Automatically selected device EP3SL50F484C2 for design test" {  } {  } 0 0 "Automatically selected device %2!s! for design %1!s!" 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "high junction temperature 85 " "Warning: The high junction temperature operating condition is not set. Assuming a default value of '85'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Warning" "WCUT_CUT_DEFAULT_OPERATING_CONDITION" "low junction temperature 0 " "Warning: The low junction temperature operating condition is not set. Assuming a default value of '0'." {  } {  } 0 0 "The %1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "" 0}
{ "Info" "IMPP_MPP_ADVANCE_INFO" "EP3SL50F484C2 " "Info: Compilation Report contains advanced information. Specifications for device EP3SL50F484C2 are subject to change. Contact Altera for information on availability. No programming file will be generated." {  } {  } 0 0 "Compilation Report contains advanced information. Specifications for device %1!s! are subject to change. Contact Altera for information on availability. No programming file will be generated." 0 0 "" 0}
{ "Info" "IMPP_MPP_NO_PIN_OUT_TOP" "" "Info: Compilation Report contains advanced information. Specifications for device(s) in the current compile are subject to change. Contact Altera for information on availability. No pin-out will be generated." { { "Info" "IMPP_MPP_NO_PIN_OUT_SUB" "EP3SL50F484C2 " "Info: Specifications for device EP3SL50F484C2 are subject to change. Contact Altera for information on availability." {  } {  } 0 0 "Specifications for device %1!s! are subject to change. Contact Altera for information on availability." 0 0 "" 0}  } {  } 0 0 "Compilation Report contains advanced information. Specifications for device(s) in the current compile are subject to change. Contact Altera for information on availability. No pin-out will be generated." 0 0 "" 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0}
{ "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_TOP" "1 0 " "Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use" { { "Info" "IFITCC_FITCC_QID_PARTITION_BACK_ANNOTATION_NONE_OVERRIDE" "24 Top " "Info: Previous placement does not exist for 24 of 24 atoms in partition Top" {  } {  } 0 0 "Previous placement does not exist for %1!d! of %1!d! atoms in partition %2!s!" 0 0 "" 0}  } {  } 0 0 "The Fitter has identified %1!d! logical partitions of which %2!d! have a previous placement to use" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP3SL70F484C2 " "Info: Device EP3SL70F484C2 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP3SE50F484C2 " "Info: Device EP3SE50F484C2 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "1 " "Info: Fitter converted 1 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_DATA0~ J18 " "Info: Pin ~ALTERA_DATA0~ is reserved at location J18" {  } {  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0}
{ "Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "10 10 " "Warning: No exact pin location assignment(s) for 10 pins of 10 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[47\] " "Info: Pin rs\[47\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[47] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[47] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[42\] " "Info: Pin rs\[42\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[42] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[42] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "so\[31\] " "Info: Pin so\[31\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 7 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[31] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[31] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "so\[30\] " "Info: Pin so\[30\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 7 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[30] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[30] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "so\[29\] " "Info: Pin so\[29\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 7 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[29] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[29] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "so\[28\] " "Info: Pin so\[28\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 7 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[28] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { so[28] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[46\] " "Info: Pin rs\[46\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[46] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[46] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[45\] " "Info: Pin rs\[45\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[45] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[45] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[44\] " "Info: Pin rs\[44\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[44] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[44] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rs\[43\] " "Info: Pin rs\[43\] not assigned to an exact location on the device" {  } { { "test.vhd" "" { Text "E:/Muxplux/Vhdl/DES/test.vhd" 6 -1 0 } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[43] } "NODE_NAME" } } { "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera quartus ii 7.1/quartus/bin/TimingClosureFloorplan.fld" "" "" { rs[43] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "TimeQuest " "Info: Fitter is using the TimeQuest Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "test.sdc " "Critical Warning: SDC file not found: 'test.sdc'" {  } {  } 1 0 "SDC file not found: '%1!s!'" 0 0 "" 0}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No %1!s! found in the design. Calling %2!s!" 0 0 "" 0}
{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "Warning: No clocks defined in design." {  } {  } 0 0 "No clocks defined in design." 0 0 "" 0}
{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0 "" 0}