ep_xor_key.vhd

来自「DES加密算法的VHDL实现,采用流水线技术实现」· VHDL 代码 · 共 14 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity ep_xor_key is
port( ra , ka : in 	std_logic_vector( 1 to 48 ) ;
		ct : out 	std_logic_vector( 1 to 48 )
	);
end entity ep_xor_key ;
architecture arch_ep_xor_key of ep_xor_key is
begin
	ct <= 	ra xor ka ;
	
end architecture arch_ep_xor_key ;