prev_cmp_sbox.fit.qmsg

DES加密算法的VHDL实现,采用流水线技术实现

{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Extra Info: Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 0 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0 "" 0}  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "80 unused 2.50 48 32 0 " "Info: Number of I/O pins in group: 80 (unused VREF, 2.50 VCCIO, 48 input, 32 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "2.5 V. " "Info: I/O standards used: 2.5 V." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0 "" 0}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "" 0}  } {  } 0 0 "Statistics of %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1A does not use unused 0 24 " "Info: I/O bank number 1A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1C does not use unused 1 25 " "Info: I/O bank number 1C does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  25 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2C does not use unused 0 26 " "Info: I/O bank number 2C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  26 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2A does not use unused 0 24 " "Info: I/O bank number 2A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3A does not use unused 0 0 " "Info: I/O bank number 3A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  0 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3C does not use unused 0 24 " "Info: I/O bank number 3C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4C does not use unused 0 24 " "Info: I/O bank number 4C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4A does not use unused 0 0 " "Info: I/O bank number 4A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  0 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5A does not use unused 0 24 " "Info: I/O bank number 5A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5C does not use unused 0 26 " "Info: I/O bank number 5C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  26 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6C does not use unused 0 26 " "Info: I/O bank number 6C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  26 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6A does not use unused 0 24 " "Info: I/O bank number 6A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7A does not use unused 0 0 " "Info: I/O bank number 7A does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  0 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7C does not use unused 0 24 " "Info: I/O bank number 7C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8C does not use unused 0 24 " "Info: I/O bank number 8C does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8A does not use unused 0 0 " "Info: I/O bank number 8A does not use VREF pins and has unused VCCIO pin