des_ip.sta.qmsg

DES加密算法的VHDL实现,采用流水线技术实现

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II " "Info: Running Quartus II TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed May 06 10:12:50 2009 " "Info: Processing started: Wed May 06 10:12:50 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta DES_IP -c DES_IP " "Info: Command: quartus_sta DES_IP -c DES_IP" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "0" "" "Info: qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "" 0 0}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "DES_IP.sdc " "Critical Warning: Synopsys Design Constraints File file not found: 'DES_IP.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 0 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "" 0 0}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "" 0 0}
{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "Info: The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." {  } {  } 0 0 "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." 0 0 "" 0 0}
{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "Warning: No clocks defined in design." {  } {  } 0 0 "No clocks defined in design." 0 0 "" 0 0}
{ "Info" "ISTA_NO_CLOCKS_TO_REPORT" "" "Info: No clocks to report" {  } {  } 0 0 "No clocks to report" 0 0 "" 0 0}
{ "Info" "0" "" "Info: Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "fmax " "Info: No fmax paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "setup " "Info: No setup paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "hold " "Info: No hold paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "recovery " "Info: No recovery paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "removal " "Info: No removal paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Warning" "WSTA_FILTERS_COULD_NOT_BE_MATCHED" "" "Warning: At least one of the filters had some problems and could not be matched." { { "Warning" "WSTA_FILTER_COULD_NOT_BE_MATCHED" "* register " "Warning: * could not be matched with a register." {  } {  } 0 0 "%1!s! could not be matched with a %2!s!." 0 0 "" 0 0}  } {  } 0 0 "At least one of the filters had some problems and could not be matched." 0 0 "" 0 0}
{ "Info" "ISTA_NO_MIN_PULSE_WIDTH_TO_REPORT" "" "Info: No minimum pulse width or minimum period width checks to report" {  } {  } 0 0 "No minimum pulse width or minimum period width checks to report" 0 0 "" 0 0}
{ "Info" "0" "" "Info: Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "" 0 0}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 0}
{ "Warning" "WTAPI_PRELIMINARY_TIMING" "EP3SL50F484C2 " "Warning: Timing characteristics of device EP3SL50F484C2 are preliminary" {  } {  } 0 0 "Timing characteristics of device %1!s! are preliminary" 0 0 "" 0 0}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 0}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "" 0 0}
{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "Info: The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." {  } {  } 0 0 "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." 0 0 "" 0 0}
{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "Warning: No clocks defined in design." {  } {  } 0 0 "No clocks defined in design." 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "fmax " "Info: No fmax paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "setup " "Info: No setup paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "hold " "Info: No hold paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "recovery " "Info: No recovery paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "removal " "Info: No removal paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Warning" "WSTA_FILTERS_COULD_NOT_BE_MATCHED" "" "Warning: At least one of the filters had some problems and could not be matched." { { "Warning" "WSTA_FILTER_COULD_NOT_BE_MATCHED" "* register " "Warning: * could not be matched with a register." {  } {  } 0 0 "%1!s! could not be matched with a %2!s!." 0 0 "" 0 0}  } {  } 0 0 "At least one of the filters had some problems and could not be matched." 0 0 "" 0 0}
{ "Info" "ISTA_NO_MIN_PULSE_WIDTH_TO_REPORT" "" "Info: No minimum pulse width or minimum period width checks to report" {  } {  } 0 0 "No minimum pulse width or minimum period width checks to report" 0 0 "" 0 0}
{ "Info" "0" "" "Info: Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "" 0 0}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 0}
{ "Warning" "WTAPI_PRELIMINARY_TIMING" "EP3SL50F484C2 " "Warning: Timing characteristics of device EP3SL50F484C2 are preliminary" {  } {  } 0 0 "Timing characteristics of device %1!s! are preliminary" 0 0 "" 0 0}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 0}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "" 0 0}
{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "Info: The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." {  } {  } 0 0 "The command derive_clocks did not find any clocks to derive.  No clocks were created or changed." 0 0 "" 0 0}
{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "Warning: No clocks defined in design." {  } {  } 0 0 "No clocks defined in design." 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "setup " "Info: No setup paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "hold " "Info: No hold paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "recovery " "Info: No recovery paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "removal " "Info: No removal paths to report" {  } {  } 0 0 "No %1!s! paths to report" 0 0 "" 0 0}
{ "Warning" "WSTA_FILTERS_COULD_NOT_BE_MATCHED" "" "Warning: At least one of the filters had some problems and could not be matched." { { "Warning" "WSTA_FILTER_COULD_NOT_BE_MATCHED" "* register " "Warning: * could not be matched with a register." {  } {  } 0 0 "%1!s! could not be matched with a %2!s!." 0 0 "" 0 0}  } {  } 0 0 "At least one of the filters had some problems and could not be matched." 0 0 "" 0 0}
{ "Info" "ISTA_NO_MIN_PULSE_WIDTH_TO_REPORT" "" "Info: No minimum pulse width or minimum period width checks to report" {  } {  } 0 0 "No minimum pulse width or minimum period width checks to report" 0 0 "" 0 0}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Info: Design is not fully constrained for setup requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 0}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Info: Design is not fully constrained for hold requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 12 s Quartus II " "Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 12 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "285 " "Info: Peak virtual memory: 285 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed May 06 10:13:36 2009 " "Info: Processing ended: Wed May 06 10:13:36 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:46 " "Info: Elapsed time: 00:00:46" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:44 " "Info: Total CPU time (on all processors): 00:00:44" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}