prev_cmp_rr.qmsg

DES加密算法的VHDL实现,采用流水线技术实现

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ep_xor_key ep_xor_key:inst1 " "Info: Elaborating entity \"ep_xor_key\" for hierarchy \"ep_xor_key:inst1\"" {  } { { "RR.bdf" "inst1" { Schematic "E:/Muxplux/Vhdl/DES/RR.bdf" { { 200 528 664 296 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "ep.vhd 2 1 " "Warning: Using design file ep.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ep-arch_ep " "Info: Found design unit 1: ep-arch_ep" {  } { { "ep.vhd" "" { Text "E:/Muxplux/Vhdl/DES/ep.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ep " "Info: Found entity 1: ep" {  } { { "ep.vhd" "" { Text "E:/Muxplux/Vhdl/DES/ep.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ep ep:inst " "Info: Elaborating entity \"ep\" for hierarchy \"ep:inst\"" {  } { { "RR.bdf" "inst" { Schematic "E:/Muxplux/Vhdl/DES/RR.bdf" { { 200 368 496 296 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "400 " "Info: Implemented 400 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "112 " "Info: Implemented 112 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "32 " "Info: Implemented 32 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "112 " "Info: Implemented 112 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "150 " "Info: Allocated 150 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Aug 06 10:57:28 2007 " "Info: Processing ended: Mon Aug 06 10:57:28 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}