prev_cmp_rr.qmsg

DES加密算法的VHDL实现,采用流水线技术实现

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LxorR LxorR:inst3 " "Info: Elaborating entity \"LxorR\" for hierarchy \"LxorR:inst3\"" {  } { { "RR.bdf" "inst3" { Schematic "E:/Muxplux/Vhdl/DES/RR.bdf" { { 200 1056 1184 296 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "pp.vhd 2 1 " "Warning: Using design file pp.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pp-arch_pp " "Info: Found design unit 1: pp-arch_pp" {  } { { "pp.vhd" "" { Text "E:/Muxplux/Vhdl/DES/pp.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 pp " "Info: Found entity 1: pp" {  } { { "pp.vhd" "" { Text "E:/Muxplux/Vhdl/DES/pp.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "pp pp:inst2 " "Info: Elaborating entity \"pp\" for hierarchy \"pp:inst2\"" {  } { { "RR.bdf" "inst2" { Schematic "E:/Muxplux/Vhdl/DES/RR.bdf" { { 200 856 992 296 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "sbox.vhd 2 1 " "Warning: Using design file sbox.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sbox-arch_sbox " "Info: Found design unit 1: sbox-arch_sbox" {  } { { "sbox.vhd" "" { Text "E:/Muxplux/Vhdl/DES/sbox.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sbox " "Info: Found entity 1: sbox" {  } { { "sbox.vhd" "" { Text "E:/Muxplux/Vhdl/DES/sbox.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sbox sbox:inst5 " "Info: Elaborating entity \"sbox\" for hierarchy \"sbox:inst5\"" {  } { { "RR.bdf" "inst5" { Schematic "E:/Muxplux/Vhdl/DES/RR.bdf" { { 200 688 824 296 "inst5" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "ep_xor_key.vhd 2 1 " "Warning: Using design file ep_xor_key.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ep_xor_key-arch_ep_xor_key " "Info: Found design unit 1: ep_xor_key-arch_ep_xor_key" {  } { { "ep_xor_key.vhd" "" { Text "E:/Muxplux/Vhdl/DES/ep_xor_key.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ep_xor_key " "Info: Found entity 1: ep_xor_key" {  } { { "ep_xor_key.vhd" "" { Text "E:/Muxplux/Vhdl/DES/ep_xor_key.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0 "" 0}