enlxorr.vhd

DES加密算法的VHDL实现,采用流水线技术实现

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity enLxorR is
port( rp , ri : 	 in 	std_logic_vector( 1 to 32 ) ;
		ln  :	out 	std_logic_vector( 1 to 32 )
	) ;
end entity enLxorR ;
architecture arch_enLxorR of enLxorR is
begin
	ln <= rp xor ri ;

end architecture arch_enLxorR ;