time.rpt

该程序是用VHDL语言实现的时钟程序

Project Information     d:\wang\chicago1.0&2.0\sample\chicago2.0\time\time.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 05/11/2003 11:42:00

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir 			    LCs
POF       Device          Pins    Pins     Pins      LCs    % Utilized

time      EPF6016TC144-3   5        16       0       268         20 %

User Pins:                 5        16       0  



Project Information     d:\wang\chicago1.0&2.0\sample\chicago2.0\time\time.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

time@142                          ADJ
time@87                           CLK
time@122                          comm0
time@121                          comm1
time@119                          comm2
time@118                          comm3
time@116                          comm4
time@115                          comm5
time@138                          data0
time@137                          data1
time@136                          data2
time@135                          data3
time@131                          data4
time@132                          data5
time@133                          data6
time@134                          data7
time@88                           LED1
time@93                           LED2
time@140                          RST
time@141                          SEL
time@95                           SET


Project Information     d:\wang\chicago1.0&2.0\sample\chicago2.0\time\time.rpt

** FILE HIERARCHY **



|divclk:71|
|divclk:71|lpm_add_sub:92|
|divclk:71|lpm_add_sub:92|addcore:adder|
|divclk:71|lpm_add_sub:92|altshift:result_ext_latency_ffs|
|divclk:71|lpm_add_sub:92|altshift:carry_ext_latency_ffs|
|divclk:71|lpm_add_sub:92|altshift:oflow_ext_latency_ffs|
|divclk:71|lpm_add_sub:156|
|divclk:71|lpm_add_sub:156|addcore:adder|
|divclk:71|lpm_add_sub:156|altshift:result_ext_latency_ffs|
|divclk:71|lpm_add_sub:156|altshift:carry_ext_latency_ffs|
|divclk:71|lpm_add_sub:156|altshift:oflow_ext_latency_ffs|
|divclk:71|lpm_add_sub:190|
|divclk:71|lpm_add_sub:190|addcore:adder|
|divclk:71|lpm_add_sub:190|altshift:result_ext_latency_ffs|
|divclk:71|lpm_add_sub:190|altshift:carry_ext_latency_ffs|
|divclk:71|lpm_add_sub:190|altshift:oflow_ext_latency_ffs|
|divclk:71|lpm_add_sub:211|
|divclk:71|lpm_add_sub:211|addcore:adder|
|divclk:71|lpm_add_sub:211|altshift:result_ext_latency_ffs|
|divclk:71|lpm_add_sub:211|altshift:carry_ext_latency_ffs|
|divclk:71|lpm_add_sub:211|altshift:oflow_ext_latency_ffs|
|cnt:81|
|cnt:81|lpm_add_sub:630|
|cnt:81|lpm_add_sub:630|addcore:adder|
|cnt:81|lpm_add_sub:630|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:630|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:630|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:809|
|cnt:81|lpm_add_sub:809|addcore:adder|
|cnt:81|lpm_add_sub:809|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:809|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:809|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:1008|
|cnt:81|lpm_add_sub:1008|addcore:adder|
|cnt:81|lpm_add_sub:1008|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:1008|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:1008|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:1227|
|cnt:81|lpm_add_sub:1227|addcore:adder|
|cnt:81|lpm_add_sub:1227|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:1227|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:1227|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:1480|
|cnt:81|lpm_add_sub:1480|addcore:adder|
|cnt:81|lpm_add_sub:1480|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:1480|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:1480|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:1814|
|cnt:81|lpm_add_sub:1814|addcore:adder|
|cnt:81|lpm_add_sub:1814|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:1814|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:1814|altshift:oflow_ext_latency_ffs|
|cnt:81|lpm_add_sub:1821|
|cnt:81|lpm_add_sub:1821|addcore:adder|
|cnt:81|lpm_add_sub:1821|altshift:result_ext_latency_ffs|
|cnt:81|lpm_add_sub:1821|altshift:carry_ext_latency_ffs|
|cnt:81|lpm_add_sub:1821|altshift:oflow_ext_latency_ffs|
|decode:88|
|decode:88|deco10:mydecode1|
|decode:88|deco10:mydecode2|
|decode:88|deco10:mydecode3|
|decode:88|deco10:mydecode4|
|decode:88|deco10:mydecode5|
|decode:88|deco10:mydecode6|
|sysctrl:90|
|sysctrl:90|lpm_add_sub:160|
|sysctrl:90|lpm_add_sub:160|addcore:adder|
|sysctrl:90|lpm_add_sub:160|altshift:result_ext_latency_ffs|
|sysctrl:90|lpm_add_sub:160|altshift:carry_ext_latency_ffs|
|sysctrl:90|lpm_add_sub:160|altshift:oflow_ext_latency_ffs|
|timec:91|


Device-Specific Information:d:\wang\chicago1.0&2.0\sample\chicago2.0\time\time.rpt
time

***** Logic for device 'time' compiled without errors.




Device: EPF6016TC144-3

FLEX 6000 Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    Enable JTAG Support                        = OFF
    MultiVolt I/O                              = OFF

                                                                                         
                                                                                         
                R R       R                 R R         R R     R     R     R R R R R R  
                E E       E                 E E         E E     E     E     E E E E E E  
                S S       S                 S S       ^ S S     S     S     S S S S S S  
                E E       E d d d d d d d d E E ^ V   D E E c c E c c E c c E E E E E E  
                R R       R a a a a a a a a R R D C   A R R o o R o o R o o R R R R R R  
                V V A S R V t t t t t t t t V V C C G T V V m m V m m V m m V V V V V V  
                E E D E S E a a a a a a a a E E L I N A E E m m E m m E m m E E E E E E  
                D D J L T D 0 1 2 3 7 6 5 4 D D K O D 0 D D 0 1 D 2 3 D 4 5 D D D D D D  
              --------------------------------------------------------------------------_ 
             / 144 142 140 138 136 134 132 130 128 126 124 122 120 118 116 114 112 110   |_ 
            /    143 141 139 137 135 133 131 129 127 125 123 121 119 117 115 113 111 109    | 
  RESERVED |  1                                                                         108 | RESERVED 
  RESERVED |  2                                                                         107 | RESERVED 
  RESERVED |  3                                                                         106 | RESERVED 
      ^nCE |  4                                                                         105 | ^CONF_DONE 
       GND |  5                                                                         104 | VCCIO 
    VCCINT |  6                                                                         103 | VCCINT 
     VCCIO |  7                                                                         102 | GND 
  RESERVED |  8                                                                         101 | RESERVED 
  RESERVED |  9                                                                         100 | RESERVED 
  RESERVED | 10                                                                          99 | RESERVED 
  RESERVED | 11                                                                          98 | RESERVED 
  RESERVED | 12                                                                          97 | RESERVED 
  RESERVED | 13                                                                          96 | RESERVED 
  RESERVED | 14                                                                          95 | SET 
  RESERVED | 15                                                                          94 | RESERVED 
  RESERVED | 16                                                                          93 | LED2 
       GND | 17                                                                          92 | GND 
       GND | 18                                                                          91 | VCCIO 
     VCCIO | 19                             EPF6016TC144-3                               90 | GND 
       GND | 20                                                                          89 | GND 
  RESERVED | 21                                                                          88 | LED1 
  RESERVED | 22                                                                          87 | CLK 
  RESERVED | 23                                                                          86 | RESERVED 
  RESERVED | 24                                                                          85 | RESERVED 
  RESERVED | 25                                                                          84 | RESERVED 
  RESERVED | 26                                                                          83 | RESERVED 
  RESERVED | 27                                                                          82 | RESERVED 
  RESERVED | 28                                                                          81 | RESERVED 
  RESERVED | 29                                                                          80 | RESERVED 
       GND | 30                                                                          79 | RESERVED 
    VCCINT | 31                                                                          78 | VCCIO 
     VCCIO | 32                                                                          77 | VCCINT