ddsc.tan.summary

DDS数字频率合成器

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.204 ns
From           : freqin[2]
To             : acc[31]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 14.226 ns
From           : lpm_rom:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated|ram_block1a4~porta_address_reg9
To             : ddsout[6]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.340 ns
From           : freqin[4]
To             : acc[4]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 180.05 MHz ( period = 5.554 ns )
From           : acc[26]
To             : lpm_rom:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated|ram_block1a4~porta_address_reg4
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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