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📄 ddsc.map.rpt

📁 DDS数字频率合成器
💻 RPT
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;                                             ;       ;
; Total registers                             ; 32    ;
;     -- Dedicated logic registers            ; 32    ;
;     -- I/O registers                        ; 0     ;
;                                             ;       ;
; I/O pins                                    ; 43    ;
; Total memory bits                           ; 10240 ;
; Maximum fan-out node                        ; clk   ;
; Maximum fan-out                             ; 42    ;
; Total fan-out                               ; 279   ;
; Average fan-out                             ; 2.38  ;
+---------------------------------------------+-------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                            ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------+
; Compilation Hierarchy Node                   ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                 ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------+
; |ddsc                                        ; 32 (32)           ; 32 (32)      ; 10240       ; 0            ; 0       ; 0         ; 43   ; 0            ; |ddsc                                                                               ;
;    |lpm_rom:i_rom|                           ; 0 (0)             ; 0 (0)        ; 10240       ; 0            ; 0       ; 0         ; 0    ; 0            ; |ddsc|lpm_rom:i_rom                                                                 ;
;       |altrom:srom|                          ; 0 (0)             ; 0 (0)        ; 10240       ; 0            ; 0       ; 0         ; 0    ; 0            ; |ddsc|lpm_rom:i_rom|altrom:srom                                                     ;
;          |altsyncram:rom_block|              ; 0 (0)             ; 0 (0)        ; 10240       ; 0            ; 0       ; 0         ; 0    ; 0            ; |ddsc|lpm_rom:i_rom|altrom:srom|altsyncram:rom_block                                ;
;             |altsyncram_hb01:auto_generated| ; 0 (0)             ; 0 (0)        ; 10240       ; 0            ; 0       ; 0         ; 0    ; 0            ; |ddsc|lpm_rom:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated ;
+----------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                         ;
+------------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+-------+-------------+
; Name                                                                                     ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size  ; MIF         ;
+------------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+-------+-------------+
; lpm_rom:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated|ALTSYNCRAM ; AUTO ; ROM  ; 1024         ; 10           ; --           ; --           ; 10240 ; sin_rom.mif ;
+------------------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+-------+-------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 32    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+------------------------------------------------------------------------------------------------------+
; Source assignments for LPM_ROM:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------+
; Assignment                      ; Value              ; From ; To                                     ;
+---------------------------------+--------------------+------+----------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                      ;
+---------------------------------+--------------------+------+----------------------------------------+


+----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |ddsc ;
+----------------+-------+---------------------------------------------+
; Parameter Name ; Value ; Type                                        ;
+----------------+-------+---------------------------------------------+
; freq_width     ; 32    ; Signed Integer                              ;
; phase_width    ; 12    ; Signed Integer                              ;
; adder_width    ; 32    ; Signed Integer                              ;
; romad_width    ; 10    ; Signed Integer                              ;
; rom_d_width    ; 10    ; Signed Integer                              ;
+----------------+-------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------+
; Parameter Settings for User Entity Instance: LPM_ROM:i_rom ;
+------------------------+--------------+--------------------+
; Parameter Name         ; Value        ; Type               ;
+------------------------+--------------+--------------------+
; LPM_WIDTH              ; 10           ; Signed Integer     ;
; LPM_WIDTHAD            ; 10           ; Signed Integer     ;
; LPM_NUMWORDS           ; 0            ; Signed Integer     ;
; LPM_ADDRESS_CONTROL    ; UNREGISTERED ; Untyped            ;
; LPM_OUTDATA            ; REGISTERED   ; Untyped            ;
; LPM_FILE               ; sin_rom.mif  ; Untyped            ;
; DEVICE_FAMILY          ; Cyclone II   ; Untyped            ;
; AUTO_CARRY_CHAINS      ; ON           ; AUTO_CARRY         ;
; IGNORE_CARRY_BUFFERS   ; OFF          ; IGNORE_CARRY       ;
; AUTO_CASCADE_CHAINS    ; ON           ; AUTO_CASCADE       ;
; IGNORE_CASCADE_BUFFERS ; OFF          ; IGNORE_CASCADE     ;
+------------------------+--------------+--------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.1 Build 201 11/27/2006 SJ Full Version
    Info: Processing started: Tue May 12 15:41:39 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ddsc -c ddsc
Info: Found 2 design units, including 1 entities, in source file ddsc.vhd
    Info: Found design unit 1: ddsc-behave
    Info: Found entity 1: ddsc
Info: Elaborating entity "ddsc" for the top level hierarchy
Info: Found 1 design units, including 1 entities, in source file ../../altera/61/quartus/libraries/megafunctions/LPM_ROM.tdf
    Info: Found entity 1: lpm_rom
Info: Elaborating entity "LPM_ROM" for hierarchy "LPM_ROM:i_rom"
Info: Elaborated megafunction instantiation "LPM_ROM:i_rom"
Info: Found 1 design units, including 1 entities, in source file ../../altera/61/quartus/libraries/megafunctions/altrom.tdf
    Info: Found entity 1: altrom
Info: Elaborating entity "altrom" for hierarchy "LPM_ROM:i_rom|altrom:srom"
Warning: Assertion warning: Can't convert ROM for Cyclone II device family using altsyncram megafunction -- implementing ROM using benchmarking mode by moving output registers to the input side. Power-up states and behavior may be different.
Info: Assertion information: Clocko port is used as clock for the address input port
Info: Elaborated megafunction instantiation "LPM_ROM:i_rom|altrom:srom", which is child of megafunction instantiation "LPM_ROM:i_rom"
Info: Instantiated megafunction "LPM_ROM:i_rom" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "10"
    Info: Parameter "LPM_WIDTHAD" = "10"
    Info: Parameter "LPM_NUMWORDS" = "0"
    Info: Parameter "LPM_ADDRESS_CONTROL" = "UNREGISTERED"
    Info: Parameter "LPM_OUTDATA" = "REGISTERED"
    Info: Parameter "LPM_FILE" = "sin_rom.mif"
    Info: Parameter "LPM_TYPE" = "LPM_ROM"
    Info: Parameter "INTENDED_DEVICE_FAMILY" = "UNUSED"
    Info: Parameter "LPM_HINT" = "UNUSED"
Info: Found 1 design units, including 1 entities, in source file ../../altera/61/quartus/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "LPM_ROM:i_rom|altrom:srom|altsyncram:rom_block"
Info: Elaborated megafunction instantiation "LPM_ROM:i_rom|altrom:srom|altsyncram:rom_block", which is child of megafunction instantiation "LPM_ROM:i_rom"
Info: Instantiated megafunction "LPM_ROM:i_rom" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "10"
    Info: Parameter "LPM_WIDTHAD" = "10"
    Info: Parameter "LPM_NUMWORDS" = "0"
    Info: Parameter "LPM_ADDRESS_CONTROL" = "UNREGISTERED"
    Info: Parameter "LPM_OUTDATA" = "REGISTERED"
    Info: Parameter "LPM_FILE" = "sin_rom.mif"
    Info: Parameter "LPM_TYPE" = "LPM_ROM"
    Info: Parameter "INTENDED_DEVICE_FAMILY" = "UNUSED"
    Info: Parameter "LPM_HINT" = "UNUSED"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_hb01.tdf
    Info: Found entity 1: altsyncram_hb01
Info: Elaborating entity "altsyncram_hb01" for hierarchy "LPM_ROM:i_rom|altrom:srom|altsyncram:rom_block|altsyncram_hb01:auto_generated"
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[0] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[1] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[2] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[3] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[4] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[5] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[6] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[7] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[8] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer lpm_rom:i_rom|otri[9] feeding logic, open-drain buffer, or output pin
Info: Implemented 85 device resources after synthesis - the final resource count might be different
    Info: Implemented 33 input pins
    Info: Implemented 10 output pins
    Info: Implemented 32 logic cells
    Info: Implemented 10 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings
    Info: Allocated 173 megabytes of memory during processing
    Info: Processing ended: Tue May 12 15:41:41 2009
    Info: Elapsed time: 00:00:02


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