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📄 ddsc.vho

📁 DDS数字频率合成器
💻 VHO
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	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(7),
	combout => \freqin~combout\(7));

\acc[6]~I\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk~clkctrl\,
	datain => \acc[6]~153\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => acc(6));

\acc[5]~I\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk~clkctrl\,
	datain => \acc[5]~154\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => acc(5));

\freqin[4]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(4),
	combout => \freqin~combout\(4));

\acc[3]~I\ : cycloneii_lcell_ff
PORT MAP (
	clk => \clk~clkctrl\,
	datain => \acc[3]~156\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => acc(3));

\freqin[2]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(2),
	combout => \freqin~combout\(2));

\freqin[1]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(1),
	combout => \freqin~combout\(1));

\freqin[0]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(0),
	combout => \freqin~combout\(0));

\acc[3]~156_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[3]~156\ = acc(3) & (\freqin~combout\(3) & \acc[2]~162\ & VCC # !\freqin~combout\(3) & !\acc[2]~162\) # !acc(3) & (\freqin~combout\(3) & !\acc[2]~162\ # !\freqin~combout\(3) & (\acc[2]~162\ # GND))
-- \acc[3]~163\ = CARRY(acc(3) & !\freqin~combout\(3) & !\acc[2]~162\ # !acc(3) & (!\acc[2]~162\ # !\freqin~combout\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(3),
	datab => \freqin~combout\(3),
	datad => VCC,
	cin => \acc[2]~162\,
	combout => \acc[3]~156\,
	cout => \acc[3]~163\);

\acc[5]~154_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[5]~154\ = acc(5) & (\freqin~combout\(5) & \acc[4]~164\ & VCC # !\freqin~combout\(5) & !\acc[4]~164\) # !acc(5) & (\freqin~combout\(5) & !\acc[4]~164\ # !\freqin~combout\(5) & (\acc[4]~164\ # GND))
-- \acc[5]~165\ = CARRY(acc(5) & !\freqin~combout\(5) & !\acc[4]~164\ # !acc(5) & (!\acc[4]~164\ # !\freqin~combout\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(5),
	datab => \freqin~combout\(5),
	datad => VCC,
	cin => \acc[4]~164\,
	combout => \acc[5]~154\,
	cout => \acc[5]~165\);

\acc[6]~153_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[6]~153\ = (acc(6) $ \freqin~combout\(6) $ !\acc[5]~165\) # GND
-- \acc[6]~166\ = CARRY(acc(6) & (\freqin~combout\(6) # !\acc[5]~165\) # !acc(6) & \freqin~combout\(6) & !\acc[5]~165\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(6),
	datab => \freqin~combout\(6),
	datad => VCC,
	cin => \acc[5]~165\,
	combout => \acc[6]~153\,
	cout => \acc[6]~166\);

\acc[8]~151_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[8]~151\ = (acc(8) $ \freqin~combout\(8) $ !\acc[7]~167\) # GND
-- \acc[8]~168\ = CARRY(acc(8) & (\freqin~combout\(8) # !\acc[7]~167\) # !acc(8) & \freqin~combout\(8) & !\acc[7]~167\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(8),
	datab => \freqin~combout\(8),
	datad => VCC,
	cin => \acc[7]~167\,
	combout => \acc[8]~151\,
	cout => \acc[8]~168\);

\acc[10]~149_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[10]~149\ = (acc(10) $ \freqin~combout\(10) $ !\acc[9]~169\) # GND
-- \acc[10]~170\ = CARRY(acc(10) & (\freqin~combout\(10) # !\acc[9]~169\) # !acc(10) & \freqin~combout\(10) & !\acc[9]~169\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(10),
	datab => \freqin~combout\(10),
	datad => VCC,
	cin => \acc[9]~169\,
	combout => \acc[10]~149\,
	cout => \acc[10]~170\);

\acc[12]~147_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[12]~147\ = (acc(12) $ \freqin~combout\(12) $ !\acc[11]~171\) # GND
-- \acc[12]~172\ = CARRY(acc(12) & (\freqin~combout\(12) # !\acc[11]~171\) # !acc(12) & \freqin~combout\(12) & !\acc[11]~171\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(12),
	datab => \freqin~combout\(12),
	datad => VCC,
	cin => \acc[11]~171\,
	combout => \acc[12]~147\,
	cout => \acc[12]~172\);

\acc[19]~140_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[19]~140\ = acc(19) & (\freqin~combout\(19) & \acc[18]~178\ & VCC # !\freqin~combout\(19) & !\acc[18]~178\) # !acc(19) & (\freqin~combout\(19) & !\acc[18]~178\ # !\freqin~combout\(19) & (\acc[18]~178\ # GND))
-- \acc[19]~179\ = CARRY(acc(19) & !\freqin~combout\(19) & !\acc[18]~178\ # !acc(19) & (!\acc[18]~178\ # !\freqin~combout\(19)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(19),
	datab => \freqin~combout\(19),
	datad => VCC,
	cin => \acc[18]~178\,
	combout => \acc[19]~140\,
	cout => \acc[19]~179\);

\acc[21]~138_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \acc[21]~138\ = acc(21) & (\freqin~combout\(21) & \acc[20]~180\ & VCC # !\freqin~combout\(21) & !\acc[20]~180\) # !acc(21) & (\freqin~combout\(21) & !\acc[20]~180\ # !\freqin~combout\(21) & (\acc[20]~180\ # GND))
-- \acc[21]~181\ = CARRY(acc(21) & !\freqin~combout\(21) & !\acc[20]~180\ # !acc(21) & (!\acc[20]~180\ # !\freqin~combout\(21)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => acc(21),
	datab => \freqin~combout\(21),
	datad => VCC,
	cin => \acc[20]~180\,
	combout => \acc[21]~138\,
	cout => \acc[21]~181\);

\freqin[25]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(25),
	combout => \freqin~combout\(25));

\freqin[27]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(27),
	combout => \freqin~combout\(27));

\freqin[30]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(30),
	combout => \freqin~combout\(30));

\clk~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_clk,
	combout => \clk~combout\);

\clk~clkctrl_I\ : cycloneii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "falling edge")
-- pragma translate_on
PORT MAP (
	inclk => \clk~clkctrl_I_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~clkctrl\);

\freqin[22]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_freqin(22),
	combout => \freqin~combout\(22));

\freqin[21]~I\ : cycloneii_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
12345

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