mg8lh.map.qmsg

实现简单CPU功能的源码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "Copyright (C) 1991-2007 Altera Corporation. All rights reserved. " "Info: Copyright (C) 1991-2007 Altera Corporation. All rights reserved." {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "Your use of Altera Corporation's design tools, logic functions  " "Info: Your use of Altera Corporation's design tools, logic functions " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "and other software and tools, and its AMPP partner logic  " "Info: and other software and tools, and its AMPP partner logic " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "functions, and any output files from any of the foregoing  " "Info: functions, and any output files from any of the foregoing " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "(including device programming or simulation files), and any  " "Info: (including device programming or simulation files), and any " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "associated documentation or information are expressly subject  " "Info: associated documentation or information are expressly subject " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "to the terms and conditions of the Altera Program License  " "Info: to the terms and conditions of the Altera Program License " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "Subscription Agreement, Altera MegaCore Function License  " "Info: Subscription Agreement, Altera MegaCore Function License " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "Agreement, or other applicable license agreement, including,  " "Info: Agreement, or other applicable license agreement, including, " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "without limitation, that your use is for the sole purpose of  " "Info: without limitation, that your use is for the sole purpose of " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "programming logic devices manufactured by Altera and sold by  " "Info: programming logic devices manufactured by Altera and sold by " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "Altera or its authorized distributors.  Please refer to the  " "Info: Altera or its authorized distributors.  Please refer to the " {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_LEGAL" "applicable agreement for further details. " "Info: applicable agreement for further details." {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Apr 25 14:27:40 2008 " "Info: Processing started: Fri Apr 25 14:27:40 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map mg8lh --source=D:\\CPU/greybox_tmp/mg8lh.v --family=FLEX10K " "Info: Command: quartus_map mg8lh --source=D:\\CPU/greybox_tmp/mg8lh.v --family=FLEX10K" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mg8lh.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file mg8lh.v" { { "Info" "ISGN_ENTITY_NAME" "1 mg8lh " "Info: Found entity 1: mg8lh" {  } { { "mg8lh.v" "" { Text "D:/CPU/greybox_tmp/mg8lh.v" 28 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "mg8lh " "Info: Elaborating entity \"mg8lh\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/program files/quartus2/quartus/libraries/megafunctions/lpm_ram_dq.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/program files/quartus2/quartus/libraries/megafunctions/lpm_ram_dq.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ram_dq " "Info: Found entity 1: lpm_ram_dq" {  } { { "lpm_ram_dq.tdf" "" { Text "f:/program files/quartus2/quartus/libraries/megafunctions/lpm_ram_dq.tdf" 60 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_ram_dq lpm_ram_dq:mgl_prim1 " "Info: Elaborating entity \"lpm_ram_dq\" for hierarchy \"lpm_ram_dq:mgl_prim1\"" {  } { { "mg8lh.v" "mgl_prim1" { Text "D:/CPU/greybox_tmp/mg8lh.v" 49 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_ram_dq:mgl_prim1 " "Info: Elaborated megafunction instantiation \"lpm_ram_dq:mgl_prim1\"" {  } { { "mg8lh.v" "" { Text "D:/CPU/greybox_tmp/mg8lh.v" 49 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/program files/quartus2/quartus/libraries/megafunctions/altram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file f:/program files/quartus2/quartus/libraries/megafunctions/altram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altram " "Info: Found entity 1: altram" {  } { { "altram.tdf" "" { Text "f:/program files/quartus2/quartus/libraries/megafunctions/altram.tdf" 90 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altram lpm_ram_dq:mgl_prim1\|altram:sram " "Info: Elaborating entity \"altram\" for hierarchy \"lpm_ram_dq:mgl_prim1\|altram:sram\"" {  } { { "lpm_ram_dq.tdf" "sram" { Text "f:/program files/quartus2/quartus/libraries/megafunctions/lpm_ram_dq.tdf" 115 6 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_ram_dq:mgl_prim1\|altram:sram lpm_ram_dq:mgl_prim1 " "Info: Elaborated megafunction instantiation \"lpm_ram_dq:mgl_prim1\|altram:sram\", which is child of megafunction instantiation \"lpm_ram_dq:mgl_prim1\"" {  } { { "lpm_ram_dq.tdf" "" { Text "f:/program files/quartus2/quartus/libraries/megafunctions/lpm_ram_dq.tdf" 115 6 0 } } { "mg8lh.v" "" { Text "D:/CPU/greybox_tmp/mg8lh.v" 49 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_ram_dq:mgl_prim1 " "Info: Instantiated megafunction \"lpm_ram_dq:mgl_prim1\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_address_control REGISTERED " "Info: Parameter \"lpm_address_control\" = \"REGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_file RAM.mif " "Info: Parameter \"lpm_file\" = \"RAM.mif\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_indata UNREGISTERED " "Info: Parameter \"lpm_indata\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_outdata UNREGISTERED " "Info: Parameter \"lpm_outdata\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_RAM_DQ " "Info: Parameter \"lpm_type\" = \"LPM_RAM_DQ\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 16 " "Info: Parameter \"lpm_width\" = \"16\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthad 8 " "Info: Parameter \"lpm_widthad\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "mg8lh.v" "" { Text "D:/CPU/greybox_tmp/mg8lh.v" 49 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "58 " "Info: Implemented 58 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "26 " "Info: Implemented 26 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Info: Implemented 16 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "127 " "Info: Allocated 127 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Fri Apr 25 14:27:43 2008 " "Info: Processing ended: Fri Apr 25 14:27:43 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}