ram.tan.rpt

来自「实现简单CPU功能的源码」· RPT 代码 · 共 360 行 · 第 1/5 页

; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; inclock         ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+------------+------------+----------------------------------------------------------------------------+----------+
; Slack                                   ; Required tsu                                        ; Actual tsu ; From       ; To                                                                         ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+------------+----------------------------------------------------------------------------+----------+
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[15]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[14]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[13]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[12]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[11]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[10]~reg_we0 ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[9]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[8]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[7]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[6]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[5]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[4]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[3]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[2]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[1]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 6.200 ns   ; we         ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[0]~reg_we0  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[14]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[14]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[13]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[13]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[12]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[12]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[11]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[11]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[10]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[10]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[9]~reg_ra5  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[9]~reg_wa5  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[8]~reg_ra5  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[8]~reg_wa5  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[7]~reg_ra5  ; inclock  ;
; N/A                                     ; None                                                ; 3.800 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[7]~reg_wa5  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[14]~reg_ra6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[14]~reg_wa6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[13]~reg_ra6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[13]~reg_wa6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[12]~reg_ra6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[12]~reg_wa6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[11]~reg_ra6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[11]~reg_wa6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[10]~reg_ra6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[10]~reg_wa6 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[9]~reg_ra6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[9]~reg_wa6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[8]~reg_ra6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[8]~reg_wa6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[7]~reg_ra6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[6] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[7]~reg_wa6  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[15]~reg_ra5 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[15]~reg_wa5 ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[6]~reg_ra5  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[6]~reg_wa5  ; inclock  ;
; N/A                                     ; None                                                ; 3.700 ns   ; address[5] ; lpm_ram_dq0:inst|lpm_ram_dq:lpm_ram_dq_component|altram:sram|q[5]~reg_ra5  ; inclock  ;