br.rpt
来自「实现简单CPU功能的源码」· RPT 代码 · 共 667 行 · 第 1/2 页
RPT
667 行
Device-Specific Information: q:\information\cpu2\br.rpt
br
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 6/ 96( 6%) 0/ 48( 0%) 5/ 48( 10%) 5/16( 31%) 4/16( 25%) 0/16( 0%)
B: 7/ 96( 7%) 0/ 48( 0%) 4/ 48( 8%) 3/16( 18%) 6/16( 37%) 0/16( 0%)
C: 0/ 96( 0%) 0/ 48( 0%) 2/ 48( 4%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
20: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
21: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: q:\information\cpu2\br.rpt
br
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 16 clk
Device-Specific Information: q:\information\cpu2\br.rpt
br
** EQUATIONS **
clk : INPUT;
cs21 : INPUT;
mbr_in0 : INPUT;
mbr_in1 : INPUT;
mbr_in2 : INPUT;
mbr_in3 : INPUT;
mbr_in4 : INPUT;
mbr_in5 : INPUT;
mbr_in6 : INPUT;
mbr_in7 : INPUT;
mbr_in8 : INPUT;
mbr_in9 : INPUT;
mbr_in10 : INPUT;
mbr_in11 : INPUT;
mbr_in12 : INPUT;
mbr_in13 : INPUT;
mbr_in14 : INPUT;
mbr_in15 : INPUT;
-- Node name is 'br_out0'
-- Equation name is 'br_out0', type is output
br_out0 = _LC8_A22;
-- Node name is 'br_out1'
-- Equation name is 'br_out1', type is output
br_out1 = _LC7_B14;
-- Node name is 'br_out2'
-- Equation name is 'br_out2', type is output
br_out2 = _LC1_B14;
-- Node name is 'br_out3'
-- Equation name is 'br_out3', type is output
br_out3 = _LC6_B14;
-- Node name is 'br_out4'
-- Equation name is 'br_out4', type is output
br_out4 = _LC5_B14;
-- Node name is 'br_out5'
-- Equation name is 'br_out5', type is output
br_out5 = _LC2_B14;
-- Node name is 'br_out6'
-- Equation name is 'br_out6', type is output
br_out6 = _LC1_A22;
-- Node name is 'br_out7'
-- Equation name is 'br_out7', type is output
br_out7 = _LC4_A22;
-- Node name is 'br_out8'
-- Equation name is 'br_out8', type is output
br_out8 = _LC3_B14;
-- Node name is 'br_out9'
-- Equation name is 'br_out9', type is output
br_out9 = _LC4_B14;
-- Node name is 'br_out10'
-- Equation name is 'br_out10', type is output
br_out10 = _LC2_A22;
-- Node name is 'br_out11'
-- Equation name is 'br_out11', type is output
br_out11 = _LC8_B14;
-- Node name is 'br_out12'
-- Equation name is 'br_out12', type is output
br_out12 = _LC3_A22;
-- Node name is 'br_out13'
-- Equation name is 'br_out13', type is output
br_out13 = _LC7_A22;
-- Node name is 'br_out14'
-- Equation name is 'br_out14', type is output
br_out14 = _LC5_A22;
-- Node name is 'br_out15'
-- Equation name is 'br_out15', type is output
br_out15 = _LC6_A22;
-- Node name is ':50'
-- Equation name is '_LC6_A22', type is buried
_LC6_A22 = DFFE( _EQ001, GLOBAL( clk), VCC, VCC, VCC);
_EQ001 = cs21 & mbr_in15
# !cs21 & _LC6_A22;
-- Node name is ':52'
-- Equation name is '_LC5_A22', type is buried
_LC5_A22 = DFFE( _EQ002, GLOBAL( clk), VCC, VCC, VCC);
_EQ002 = cs21 & mbr_in14
# !cs21 & _LC5_A22;
-- Node name is ':54'
-- Equation name is '_LC7_A22', type is buried
_LC7_A22 = DFFE( _EQ003, GLOBAL( clk), VCC, VCC, VCC);
_EQ003 = cs21 & mbr_in13
# !cs21 & _LC7_A22;
-- Node name is ':56'
-- Equation name is '_LC3_A22', type is buried
_LC3_A22 = DFFE( _EQ004, GLOBAL( clk), VCC, VCC, VCC);
_EQ004 = cs21 & mbr_in12
# !cs21 & _LC3_A22;
-- Node name is ':58'
-- Equation name is '_LC8_B14', type is buried
_LC8_B14 = DFFE( _EQ005, GLOBAL( clk), VCC, VCC, VCC);
_EQ005 = cs21 & mbr_in11
# !cs21 & _LC8_B14;
-- Node name is ':60'
-- Equation name is '_LC2_A22', type is buried
_LC2_A22 = DFFE( _EQ006, GLOBAL( clk), VCC, VCC, VCC);
_EQ006 = cs21 & mbr_in10
# !cs21 & _LC2_A22;
-- Node name is ':62'
-- Equation name is '_LC4_B14', type is buried
_LC4_B14 = DFFE( _EQ007, GLOBAL( clk), VCC, VCC, VCC);
_EQ007 = cs21 & mbr_in9
# !cs21 & _LC4_B14;
-- Node name is ':64'
-- Equation name is '_LC3_B14', type is buried
_LC3_B14 = DFFE( _EQ008, GLOBAL( clk), VCC, VCC, VCC);
_EQ008 = cs21 & mbr_in8
# !cs21 & _LC3_B14;
-- Node name is ':66'
-- Equation name is '_LC4_A22', type is buried
_LC4_A22 = DFFE( _EQ009, GLOBAL( clk), VCC, VCC, VCC);
_EQ009 = cs21 & mbr_in7
# !cs21 & _LC4_A22;
-- Node name is ':68'
-- Equation name is '_LC1_A22', type is buried
_LC1_A22 = DFFE( _EQ010, GLOBAL( clk), VCC, VCC, VCC);
_EQ010 = cs21 & mbr_in6
# !cs21 & _LC1_A22;
-- Node name is ':70'
-- Equation name is '_LC2_B14', type is buried
_LC2_B14 = DFFE( _EQ011, GLOBAL( clk), VCC, VCC, VCC);
_EQ011 = cs21 & mbr_in5
# !cs21 & _LC2_B14;
-- Node name is ':72'
-- Equation name is '_LC5_B14', type is buried
_LC5_B14 = DFFE( _EQ012, GLOBAL( clk), VCC, VCC, VCC);
_EQ012 = cs21 & mbr_in4
# !cs21 & _LC5_B14;
-- Node name is ':74'
-- Equation name is '_LC6_B14', type is buried
_LC6_B14 = DFFE( _EQ013, GLOBAL( clk), VCC, VCC, VCC);
_EQ013 = cs21 & mbr_in3
# !cs21 & _LC6_B14;
-- Node name is ':76'
-- Equation name is '_LC1_B14', type is buried
_LC1_B14 = DFFE( _EQ014, GLOBAL( clk), VCC, VCC, VCC);
_EQ014 = cs21 & mbr_in2
# !cs21 & _LC1_B14;
-- Node name is ':78'
-- Equation name is '_LC7_B14', type is buried
_LC7_B14 = DFFE( _EQ015, GLOBAL( clk), VCC, VCC, VCC);
_EQ015 = cs21 & mbr_in1
# !cs21 & _LC7_B14;
-- Node name is ':80'
-- Equation name is '_LC8_A22', type is buried
_LC8_A22 = DFFE( _EQ016, GLOBAL( clk), VCC, VCC, VCC);
_EQ016 = cs21 & mbr_in0
# !cs21 & _LC8_A22;
Project Information q:\information\cpu2\br.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:01
Fitter 00:00:00
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:01
Memory Allocated
-----------------
Peak memory allocated during compilation = 18,101K
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?