de2_board.fit.eqn

Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制

--W1L69 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_select_n_to_the_cfi_flash_0~0 at LCCOMB_X40_Y16_N22
W1L69 = W1_tri_state_bridge_0_avalon_slave_arb_addend[1] & (W1L29 # W1L21) # !W1_tri_state_bridge_0_avalon_slave_arb_addend[1] & !W1_tri_state_bridge_0_avalon_slave_arb_addend[0] & (W1L29 # W1L21);


--E1_data_out is DE2_Board:inst|DE2_Board_reset_clk_domain_synch_module:DE2_Board_reset_clk_domain_synch|data_out at LCFF_X33_Y21_N29
E1_data_out = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(A1L16), !GLOBAL(C1L2),  ,  , E1_data_in_d1,  ,  , VCC);


--W1L27 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cpu_0_instruction_master_granted_cfi_flash_0_s1~29 at LCCOMB_X40_Y17_N28
W1L27 = W1L29 & (!W1L21 & W1_tri_state_bridge_0_avalon_slave_arb_addend[1] # !W1_tri_state_bridge_0_avalon_slave_arb_addend[0]);


--W1L144 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_grant_vector[1]~31 at LCCOMB_X40_Y17_N16
W1L144 = W1L21 & (W1_tri_state_bridge_0_avalon_slave_arb_addend[1] # !W1L29 & !W1_tri_state_bridge_0_avalon_slave_arb_addend[0]);


--W1_cfi_flash_0_s1_in_a_read_cycle is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_in_a_read_cycle at LCCOMB_X38_Y17_N4
W1_cfi_flash_0_s1_in_a_read_cycle = W1L27 # H1_d_read & W1L144;


--W1_cfi_flash_0_s1_wait_counter[3] is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[3] at LCFF_X41_Y17_N29
W1_cfi_flash_0_s1_wait_counter[3] = DFFEAS(W1L8, GLOBAL(A1L16), GLOBAL(E1L4),  ,  ,  ,  ,  ,  );


--W1_d1_reasons_to_wait is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|d1_reasons_to_wait at LCFF_X41_Y17_N15
W1_d1_reasons_to_wait = DFFEAS(W1L141, GLOBAL(A1L16), GLOBAL(E1L4),  ,  ,  ,  ,  ,  );


--W1L138 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_begins_xfer~36 at LCCOMB_X41_Y17_N20
W1L138 = !W1_d1_reasons_to_wait & (W1L29 # W1L21);


--W1L92 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_readn~1 at LCCOMB_X38_Y17_N10
W1L92 = !W1_cfi_flash_0_s1_wait_counter[3] & W1_cfi_flash_0_s1_in_a_read_cycle & !W1L138;


--W1_in_a_write_cycle is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|in_a_write_cycle at LCCOMB_X38_Y17_N26
W1_in_a_write_cycle = !W1L144 # !AB1_d_write;


--W1_cfi_flash_0_s1_wait_counter[2] is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[2] at LCFF_X41_Y17_N23
W1_cfi_flash_0_s1_wait_counter[2] = DFFEAS(W1L7, GLOBAL(A1L16), GLOBAL(E1L4),  ,  ,  ,  ,  ,  );


--W1_cfi_flash_0_s1_wait_counter[1] is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|cfi_flash_0_s1_wait_counter[1] at LCFF_X41_Y17_N27
W1_cfi_flash_0_s1_wait_counter[1] = DFFEAS(W1L5, GLOBAL(A1L16), GLOBAL(E1L4),  ,  ,  ,  ,  ,  );


--W1L93 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_write_n_to_the_cfi_flash_0~104 at LCCOMB_X41_Y17_N30
W1L93 = !W1_cfi_flash_0_s1_wait_counter[1] & !W1_cfi_flash_0_s1_wait_counter[2];


--W1L94 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_write_n_to_the_cfi_flash_0~105 at LCCOMB_X41_Y17_N16
W1L94 = !W1_in_a_write_cycle & !W1L138 & (W1_cfi_flash_0_s1_wait_counter[3] $ !W1L93);


--H1_W_alu_result[21] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[21] at LCFF_X41_Y22_N13
H1_W_alu_result[21] = AMPP_FUNCTION(A1L16, H1L732, H1_E_shift_rot_result[21], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[19] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[19] at LCFF_X41_Y23_N23
H1_F_pc[19] = AMPP_FUNCTION(A1L16, H1L586, H1L815, E1L4, H1L591, H1L594, H1_W_valid);


--W1L91 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[21]~198 at LCCOMB_X42_Y21_N10
W1L91 = W1L144 & (H1_W_alu_result[21]) # !W1L144 & H1_F_pc[19];


--H1_W_alu_result[20] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[20] at LCFF_X41_Y22_N1
H1_W_alu_result[20] = AMPP_FUNCTION(A1L16, H1L729, H1_E_shift_rot_result[20], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[18] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[18] at LCFF_X40_Y23_N19
H1_F_pc[18] = AMPP_FUNCTION(A1L16, H1L583, H1L813, E1L4, H1L591, H1L594, H1_W_valid);


--W1L90 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[20]~199 at LCCOMB_X40_Y23_N26
W1L90 = W1L144 & (H1_W_alu_result[20]) # !W1L144 & H1_F_pc[18];


--H1_W_alu_result[19] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[19] at LCFF_X41_Y22_N7
H1_W_alu_result[19] = AMPP_FUNCTION(A1L16, H1L726, H1_E_shift_rot_result[19], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[17] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[17] at LCFF_X40_Y23_N9
H1_F_pc[17] = AMPP_FUNCTION(A1L16, H1L580, H1L811, E1L4, H1L591, H1L594, H1_W_valid);


--W1L89 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[19]~200 at LCCOMB_X42_Y21_N18
W1L89 = W1L144 & (H1_W_alu_result[19]) # !W1L144 & H1_F_pc[17];


--H1_W_alu_result[18] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[18] at LCFF_X42_Y21_N29
H1_W_alu_result[18] = AMPP_FUNCTION(A1L16, H1L723, H1_E_shift_rot_result[18], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[16] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[16] at LCFF_X40_Y23_N5
H1_F_pc[16] = AMPP_FUNCTION(A1L16, H1L577, H1L809, E1L4, H1L591, H1L594, H1_W_valid);


--W1L88 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[18]~201 at LCCOMB_X42_Y21_N16
W1L88 = W1L144 & (H1_W_alu_result[18]) # !W1L144 & H1_F_pc[16];


--H1_W_alu_result[17] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[17] at LCFF_X42_Y21_N31
H1_W_alu_result[17] = AMPP_FUNCTION(A1L16, H1L720, H1_E_shift_rot_result[17], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[15] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[15] at LCFF_X40_Y23_N21
H1_F_pc[15] = AMPP_FUNCTION(A1L16, H1L574, H1L807, E1L4, H1L591, H1L594, H1_W_valid);


--W1L87 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[17]~202 at LCCOMB_X41_Y21_N24
W1L87 = W1L144 & (H1_W_alu_result[17]) # !W1L144 & H1_F_pc[15];


--H1_W_alu_result[16] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[16] at LCFF_X41_Y21_N29
H1_W_alu_result[16] = AMPP_FUNCTION(A1L16, H1L717, H1_E_shift_rot_result[16], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[14] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[14] at LCFF_X40_Y23_N29
H1_F_pc[14] = AMPP_FUNCTION(A1L16, H1L571, H1L805, E1L4, H1L591, H1L594, H1_W_valid);


--W1L86 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[16]~203 at LCCOMB_X41_Y21_N16
W1L86 = W1L144 & (H1_W_alu_result[16]) # !W1L144 & H1_F_pc[14];


--H1_W_alu_result[15] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[15] at LCFF_X41_Y21_N31
H1_W_alu_result[15] = AMPP_FUNCTION(A1L16, H1L714, H1_E_shift_rot_result[15], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[13] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[13] at LCFF_X40_Y23_N17
H1_F_pc[13] = AMPP_FUNCTION(A1L16, H1L568, H1L803, E1L4, H1L591, H1L594, H1_W_valid);


--W1L85 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[15]~204 at LCCOMB_X41_Y21_N12
W1L85 = W1L144 & (H1_W_alu_result[15]) # !W1L144 & H1_F_pc[13];


--H1_W_alu_result[14] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[14] at LCFF_X36_Y22_N9
H1_W_alu_result[14] = AMPP_FUNCTION(A1L16, H1L711, H1_E_shift_rot_result[14], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[12] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[12] at LCFF_X40_Y24_N5
H1_F_pc[12] = AMPP_FUNCTION(A1L16, H1L565, H1L801, E1L4, H1L591, H1L594, H1_W_valid);


--W1L84 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[14]~205 at LCCOMB_X40_Y24_N20
W1L84 = W1L144 & (H1_W_alu_result[14]) # !W1L144 & H1_F_pc[12];


--H1_W_alu_result[13] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[13] at LCFF_X42_Y23_N7
H1_W_alu_result[13] = AMPP_FUNCTION(A1L16, H1L708, H1_E_shift_rot_result[13], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[11] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[11] at LCFF_X40_Y24_N25
H1_F_pc[11] = AMPP_FUNCTION(A1L16, H1L562, H1L799, E1L4, H1L591, H1L594, H1_W_valid);


--W1L83 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[13]~206 at LCCOMB_X42_Y23_N14
W1L83 = W1L144 & H1_W_alu_result[13] # !W1L144 & (H1_F_pc[11]);


--H1_W_alu_result[12] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[12] at LCFF_X42_Y23_N25
H1_W_alu_result[12] = AMPP_FUNCTION(A1L16, H1L705, H1_E_shift_rot_result[12], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[10] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[10] at LCFF_X40_Y24_N27
H1_F_pc[10] = AMPP_FUNCTION(A1L16, H1L559, H1L797, E1L4, H1L591, H1L594, H1_W_valid);


--W1L82 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[12]~207 at LCCOMB_X42_Y23_N8
W1L82 = W1L144 & H1_W_alu_result[12] # !W1L144 & (H1_F_pc[10]);


--H1_W_alu_result[11] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[11] at LCFF_X42_Y23_N27
H1_W_alu_result[11] = AMPP_FUNCTION(A1L16, H1L702, H1_E_shift_rot_result[11], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[9] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[9] at LCFF_X41_Y24_N9
H1_F_pc[9] = AMPP_FUNCTION(A1L16, H1L556, H1L795, E1L4, H1L591, H1L594, H1_W_valid);


--W1L81 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[11]~208 at LCCOMB_X42_Y23_N0
W1L81 = W1L144 & (H1_W_alu_result[11]) # !W1L144 & H1_F_pc[9];


--H1_W_alu_result[10] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[10] at LCFF_X42_Y23_N3
H1_W_alu_result[10] = AMPP_FUNCTION(A1L16, H1L699, H1_E_shift_rot_result[10], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[8] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[8] at LCFF_X41_Y24_N5
H1_F_pc[8] = AMPP_FUNCTION(A1L16, H1L553, H1L793, E1L4, H1L591, H1L594, H1_W_valid);


--W1L80 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[10]~209 at LCCOMB_X41_Y24_N10
W1L80 = W1L144 & H1_W_alu_result[10] # !W1L144 & (H1_F_pc[8]);


--H1_W_alu_result[9] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[9] at LCFF_X42_Y20_N27
H1_W_alu_result[9] = AMPP_FUNCTION(A1L16, H1L696, H1_E_shift_rot_result[9], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[7] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[7] at LCFF_X41_Y24_N3
H1_F_pc[7] = AMPP_FUNCTION(A1L16, H1L550, H1L791, E1L4, H1L591, H1L594, H1_W_valid);


--W1L79 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[9]~210 at LCCOMB_X42_Y20_N14
W1L79 = W1L144 & H1_W_alu_result[9] # !W1L144 & (H1_F_pc[7]);


--H1_W_alu_result[8] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[8] at LCFF_X42_Y20_N13
H1_W_alu_result[8] = AMPP_FUNCTION(A1L16, H1L693, H1_E_shift_rot_result[8], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[6] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[6] at LCFF_X40_Y24_N19
H1_F_pc[6] = AMPP_FUNCTION(A1L16, H1L547, H1L789, E1L4, H1L591, H1L594, H1_W_valid);


--W1L78 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[8]~211 at LCCOMB_X42_Y20_N22
W1L78 = W1L144 & (H1_W_alu_result[8]) # !W1L144 & H1_F_pc[6];


--H1_W_alu_result[7] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[7] at LCFF_X42_Y20_N3
H1_W_alu_result[7] = AMPP_FUNCTION(A1L16, H1L690, H1_E_shift_rot_result[7], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[5] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[5] at LCFF_X40_Y24_N23
H1_F_pc[5] = AMPP_FUNCTION(A1L16, H1L544, H1L787, E1L4, H1L591, H1L594, H1_W_valid);


--W1L77 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[7]~212 at LCCOMB_X42_Y20_N24
W1L77 = W1L144 & (H1_W_alu_result[7]) # !W1L144 & H1_F_pc[5];


--H1_W_alu_result[6] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[6] at LCFF_X42_Y20_N1
H1_W_alu_result[6] = AMPP_FUNCTION(A1L16, H1L687, H1_E_shift_rot_result[6], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[4] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[4] at LCFF_X40_Y24_N9
H1_F_pc[4] = AMPP_FUNCTION(A1L16, H1L541, H1L785, E1L4, H1L591, H1L594, H1_W_valid);


--W1L76 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[6]~213 at LCCOMB_X42_Y21_N22
W1L76 = W1L144 & (H1_W_alu_result[6]) # !W1L144 & H1_F_pc[4];


--H1_W_alu_result[5] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[5] at LCFF_X40_Y21_N13
H1_W_alu_result[5] = AMPP_FUNCTION(A1L16, H1L684, H1_E_shift_rot_result[5], E1L4, H1L127, H1_R_ctrl_shift_rot);


--H1_F_pc[3] is DE2_Board:inst|cpu_0:the_cpu_0|F_pc[3] at LCFF_X40_Y21_N7
H1_F_pc[3] = AMPP_FUNCTION(A1L16, H1L590, E1L4, H1_W_valid);


--W1L75 is DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|p1_tri_state_bridge_0_address[5]~214 at LCCOMB_X40_Y21_N26
W1L75 = W1L144 & (H1_W_alu_result[5]) # !W1L144 & H1_F_pc[3];


--H1_W_alu_result[4] is DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[4] at LCFF_X42_Y21_N9
H1_W_alu_result[4] = AMPP_FUNCTION(A1L16, H1L681, H1_E_shift_rot_result[4], E1L4, H1L127, H1_R_ctrl_shift_rot);