📄 lcd.vm6
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SIGNAL_INSTANCE | div_counter<2>.SI | div_counter<2> | 0 | 13 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 8142 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 8143 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 8165 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<2> | 8144 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<20> | 8172 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<20>.Q | clkdiv<20> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<21> | 8173 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<21>.Q | clkdiv<21> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<22> | 8174 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<22>.Q | clkdiv<22> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<23> | 8175 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<23>.Q | clkdiv<23> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<24> | 8187 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<24>.Q | clkdiv<24> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 8141 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT1 | 8159 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT1.Q | state_FFT1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT2 | 8160 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT2.Q | state_FFT2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT3 | 8161 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT3.Q | state_FFT3 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | div_counter<2>.D1 | 8236 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | div_counter<2>.D2 | 8237 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | div_counter<2> | IV_FALSE | flag
SPPTERM | 3 | IV_TRUE | div_counter<0> | IV_TRUE | div_counter<1> | IV_TRUE | flag
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | div_counter<2>.CLKF | 8238 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 5 | IV_TRUE | clkdiv<20> | IV_TRUE | clkdiv<21> | IV_TRUE | clkdiv<22> | IV_TRUE | clkdiv<23> | IV_TRUE | clkdiv<24>
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | div_counter<2>.RSTF | 8239 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | Reset_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | div_counter<2>.CE | 8240 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 3 | IV_FALSE | state_FFT1 | IV_FALSE | state_FFT2 | IV_FALSE | state_FFT3
SRFF_INSTANCE | div_counter<2>.REG | div_counter<2> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | div_counter<2>.D | 8235 | ? | 0 | 0 | div_counter<2> | NULL | NULL | div_counter<2>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | div_counter<2>.CLKF | 8238 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 5 | IV_TRUE | clkdiv<20> | IV_TRUE | clkdiv<21> | IV_TRUE | clkdiv<22> | IV_TRUE | clkdiv<23> | IV_TRUE | clkdiv<24>
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | div_counter<2>.RSTF | 8239 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | Reset_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | div_counter<2>.CE | 8240 | ? | 0 | 4096 | div_counter<2> | NULL | NULL | div_counter<2>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 3 | IV_FALSE | state_FFT1 | IV_FALSE | state_FFT2 | IV_FALSE | state_FFT3
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | div_counter<2>.Q | 8241 | ? | 0 | 0 | div_counter<2> | NULL | NULL | div_counter<2>.REG | 0 | 8 | SRFF_Q
MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | div_counter<3> | lcd_COPY_0_COPY_0 | 2424312832 | 14 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 8142 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 8143 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<2> | 8144 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 8165 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<3> | 8145 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<3>.Q | div_counter<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<20> | 8172 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<20>.Q | clkdiv<20> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<21> | 8173 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<21>.Q | clkdiv<21> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<22> | 8174 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<22>.Q | clkdiv<22> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<23> | 8175 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<23>.Q | clkdiv<23> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<24> | 8187 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<24>.Q | clkdiv<24> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 8141 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT1 | 8159 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT1.Q | state_FFT1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT2 | 8160 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT2.Q | state_FFT2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT3 | 8161 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT3.Q | state_FFT3 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM
NODE | div_counter<3> | 8145 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<3>.Q | div_counter<3> | 1 | 0 | MC_UIM
SIGNAL_INSTANCE | div_counter<3>.SI | div_counter<3> | 0 | 14 | 5
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<0> | 8142 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<0>.Q | div_counter<0> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<1> | 8143 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<1>.Q | div_counter<1> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<2> | 8144 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<2>.Q | div_counter<2> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | flag | 8165 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | flag.Q | flag | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | div_counter<3> | 8145 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | div_counter<3>.Q | div_counter<3> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<20> | 8172 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<20>.Q | clkdiv<20> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<21> | 8173 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<21>.Q | clkdiv<21> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<22> | 8174 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<22>.Q | clkdiv<22> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<23> | 8175 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<23>.Q | clkdiv<23> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | clkdiv<24> | 8187 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | clkdiv<24>.Q | clkdiv<24> | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | Reset_IBUF | 8141 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | NULL | Reset_IBUF | 0 | 5 | II_IMUX
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT1 | 8159 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT1.Q | state_FFT1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT2 | 8160 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT2.Q | state_FFT2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT3 | 8161 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT3.Q | state_FFT3 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | div_counter<3>.D1 | 8243 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | div_counter<3>.D2 | 8244 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 2 | 9 | MC_SI_D2
SPPTERM | 2 | IV_TRUE | div_counter<3> | IV_FALSE | flag
SPPTERM | 4 | IV_TRUE | div_counter<0> | IV_TRUE | div_counter<1> | IV_TRUE | div_counter<2> | IV_TRUE | flag
OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF
SIGNAL | NODE | div_counter<3>.CLKF | 8245 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 5 | IV_TRUE | clkdiv<20> | IV_TRUE | clkdiv<21> | IV_TRUE | clkdiv<22> | IV_TRUE | clkdiv<23> | IV_TRUE | clkdiv<24>
OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF
SIGNAL | NODE | div_counter<3>.RSTF | 8246 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | Reset_IBUF
OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE
SIGNAL | NODE | div_counter<3>.CE | 8247 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 3 | IV_FALSE | state_FFT1 | IV_FALSE | state_FFT2 | IV_FALSE | state_FFT3
SRFF_INSTANCE | div_counter<3>.REG | div_counter<3> | 0 | 4 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | div_counter<3>.D | 8242 | ? | 0 | 0 | div_counter<3> | NULL | NULL | div_counter<3>.XOR | 0 | 7 | ALU_F
INPUT_NODE_TYPE | 1 | 8 | SRFF_C
SIGNAL | NODE | div_counter<3>.CLKF | 8245 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 3 | 9 | MC_SI_CLKF
SPPTERM | 5 | IV_TRUE | clkdiv<20> | IV_TRUE | clkdiv<21> | IV_TRUE | clkdiv<22> | IV_TRUE | clkdiv<23> | IV_TRUE | clkdiv<24>
INPUT_NODE_TYPE | 3 | 8 | SRFF_R
SIGNAL | NODE | div_counter<3>.RSTF | 8246 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 6 | 9 | MC_SI_RSTF
SPPTERM | 1 | IV_TRUE | Reset_IBUF
INPUT_NODE_TYPE | 4 | 8 | SRFF_CE
SIGNAL | NODE | div_counter<3>.CE | 8247 | ? | 0 | 4096 | div_counter<3> | NULL | NULL | div_counter<3>.SI | 10 | 9 | MC_SI_CE
SPPTERM | 3 | IV_FALSE | state_FFT1 | IV_FALSE | state_FFT2 | IV_FALSE | state_FFT3
OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q
NODE | div_counter<3>.Q | 8248 | ? | 0 | 0 | div_counter<3> | NULL | NULL | div_counter<3>.REG | 0 | 8 | SRFF_Q
MACROCELL_INSTANCE | OptxMapped | lcd_rw_OBUF | lcd_COPY_0_COPY_0 | 2155872256 | 3 | 1
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT1 | 8159 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT1.Q | state_FFT1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT2 | 8160 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT2.Q | state_FFT2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT3 | 8161 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT3.Q | state_FFT3 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 0 | 0 | MC_Q
NODE | lcd_rw_OBUF$Q | 8146 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | lcd_rw_OBUF.Q | lcd_rw_OBUF | 0 | 0 | MC_Q
SIGNAL_INSTANCE | lcd_rw_OBUF.SI | lcd_rw_OBUF | 0 | 3 | 2
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT1 | 8159 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT1.Q | state_FFT1 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT2 | 8160 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT2.Q | state_FFT2 | 1 | 0 | MC_UIM
INPUT_NODE_TYPE | 1 | 100 | NOTYPE
NODE | state_FFT3 | 8161 | ? | 0 | 0 | lcd_COPY_0_COPY_0 | NULL | state_FFT3.Q | state_FFT3 | 1 | 0 | MC_UIM
OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1
SIGNAL | NODE | lcd_rw_OBUF.D1 | 8250 | ? | 0 | 4096 | lcd_rw_OBUF | NULL | NULL | lcd_rw_OBUF.SI | 1 | 9 | MC_SI_D1
SPPTERM | 0 | IV_ZERO
OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2
SIGNAL | NODE | lcd_rw_OBUF.D2 | 8251 | ? | 0 | 4096 | lcd_rw_OBUF | NULL | NULL | lcd_rw_OBUF.SI | 2 | 9 | MC_SI_D2
SPPTERM | 3 | IV_FALSE | state_FFT1 | IV_FALSE | state_FFT2 | IV_FALSE | state_FFT3
SRFF_INSTANCE | lcd_rw_OBUF.REG | lcd_rw_OBUF | 0 | 1 | 1
INPUT_NODE_TYPE | 0 | 8 | SRFF_D
NODE | lcd_rw_OBUF.D | 8249 | ? | 0 | 0 | lcd_rw_OBUF | NULL | NULL | lcd_rw_OBUF.XOR | 0 | 7 | ALU_F
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