lcd.tan.qmsg

CPLD的小程序集合

{ "Info" "ITDB_FULL_NEGATIVE_HOLD_RESULT" "lcd_e~reg0 lcd_e~reg0 clk 2.604 ns " "Info: Found hold time violation between source  pin or register \"lcd_e~reg0\" and destination pin or register \"lcd_e~reg0\" for clock \"clk\" (Hold time is 2.604 ns)" { { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "4.244 ns + Largest " "Info: + Largest clock skew is 4.244 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 15.601 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 15.601 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns clk 1 CLK PIN_12 19 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_12; Fanout = 19; CLK Node = 'clk'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.267 ns) + CELL(1.294 ns) 3.724 ns clkcnt\[7\] 2 REG LC_X2_Y2_N6 4 " "Info: 2: + IC(1.267 ns) + CELL(1.294 ns) = 3.724 ns; Loc. = LC_X2_Y2_N6; Fanout = 4; REG Node = 'clkcnt\[7\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.561 ns" { clk clkcnt[7] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 81 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.875 ns) + CELL(0.914 ns) 5.513 ns Equal0~182 3 COMB LC_X2_Y2_N7 1 " "Info: 3: + IC(0.875 ns) + CELL(0.914 ns) = 5.513 ns; Loc. = LC_X2_Y2_N7; Fanout = 1; COMB Node = 'Equal0~182'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.789 ns" { clkcnt[7] Equal0~182 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.841 ns) + CELL(0.740 ns) 8.094 ns Equal0~185 4 COMB LC_X2_Y3_N7 1 " "Info: 4: + IC(1.841 ns) + CELL(0.740 ns) = 8.094 ns; Loc. = LC_X2_Y3_N7; Fanout = 1; COMB Node = 'Equal0~185'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.581 ns" { Equal0~182 Equal0~185 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.139 ns) + CELL(0.200 ns) 9.433 ns Equal0~186 5 COMB LC_X3_Y3_N4 10 " "Info: 5: + IC(1.139 ns) + CELL(0.200 ns) = 9.433 ns; Loc. = LC_X3_Y3_N4; Fanout = 10; COMB Node = 'Equal0~186'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.339 ns" { Equal0~185 Equal0~186 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.740 ns) + CELL(1.294 ns) 11.467 ns clkdiv 6 REG LC_X3_Y3_N9 3 " "Info: 6: + IC(0.740 ns) + CELL(1.294 ns) = 11.467 ns; Loc. = LC_X3_Y3_N9; Fanout = 3; REG Node = 'clkdiv'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.034 ns" { Equal0~186 clkdiv } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.216 ns) + CELL(0.918 ns) 15.601 ns lcd_e~reg0 7 REG LC_X7_Y2_N9 2 " "Info: 7: + IC(3.216 ns) + CELL(0.918 ns) = 15.601 ns; Loc. = LC_X7_Y2_N9; Fanout = 2; REG Node = 'lcd_e~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.134 ns" { clkdiv lcd_e~reg0 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.523 ns ( 41.81 % ) " "Info: Total cell delay = 6.523 ns ( 41.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.078 ns ( 58.19 % ) " "Info: Total interconnect delay = 9.078 ns ( 58.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "15.601 ns" { clk clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "15.601 ns" { clk clk~combout clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.875ns 1.841ns 1.139ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.914ns 0.740ns 0.200ns 1.294ns 0.918ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 11.357 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to source register is 11.357 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns clk 1 CLK PIN_12 19 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_12; Fanout = 19; CLK Node = 'clk'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.267 ns) + CELL(1.294 ns) 3.724 ns clkcnt\[16\] 2 REG LC_X3_Y3_N0 4 " "Info: 2: + IC(1.267 ns) + CELL(1.294 ns) = 3.724 ns; Loc. = LC_X3_Y3_N0; Fanout = 4; REG Node = 'clkcnt\[16\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.561 ns" { clk clkcnt[16] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 81 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.954 ns) + CELL(0.511 ns) 5.189 ns Equal0~186 3 COMB LC_X3_Y3_N4 10 " "Info: 3: + IC(0.954 ns) + CELL(0.511 ns) = 5.189 ns; Loc. = LC_X3_Y3_N4; Fanout = 10; COMB Node = 'Equal0~186'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.465 ns" { clkcnt[16] Equal0~186 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.740 ns) + CELL(1.294 ns) 7.223 ns clkdiv 4 REG LC_X3_Y3_N9 3 " "Info: 4: + IC(0.740 ns) + CELL(1.294 ns) = 7.223 ns; Loc. = LC_X3_Y3_N9; Fanout = 3; REG Node = 'clkdiv'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.034 ns" { Equal0~186 clkdiv } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.216 ns) + CELL(0.918 ns) 11.357 ns lcd_e~reg0 5 REG LC_X7_Y2_N9 2 " "Info: 5: + IC(3.216 ns) + CELL(0.918 ns) = 11.357 ns; Loc. = LC_X7_Y2_N9; Fanout = 2; REG Node = 'lcd_e~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.134 ns" { clkdiv lcd_e~reg0 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.180 ns ( 45.61 % ) " "Info: Total cell delay = 5.180 ns ( 45.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.177 ns ( 54.39 % ) " "Info: Total interconnect delay = 6.177 ns ( 54.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "11.357 ns" { clk clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "11.357 ns" { clk clk~combout clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.954ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.511ns 1.294ns 0.918ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "15.601 ns" { clk clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "15.601 ns" { clk clk~combout clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.875ns 1.841ns 1.139ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.914ns 0.740ns 0.200ns 1.294ns 0.918ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "11.357 ns" { clk clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "11.357 ns" { clk clk~combout clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.954ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.511ns 1.294ns 0.918ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns - " "Info: - Micro clock to output delay of source is 0.376 ns" {  } { { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.485 ns - Shortest register register " "Info: - Shortest register to register delay is 1.485 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lcd_e~reg0 1 REG LC_X7_Y2_N9 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X7_Y2_N9; Fanout = 2; REG Node = 'lcd_e~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { lcd_e~reg0 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.894 ns) + CELL(0.591 ns) 1.485 ns lcd_e~reg0 2 REG LC_X7_Y2_N9 2 " "Info: 2: + IC(0.894 ns) + CELL(0.591 ns) = 1.485 ns; Loc. = LC_X7_Y2_N9; Fanout = 2; REG Node = 'lcd_e~reg0'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.485 ns" { lcd_e~reg0 lcd_e~reg0 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.591 ns ( 39.80 % ) " "Info: Total cell delay = 0.591 ns ( 39.80 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.894 ns ( 60.20 % ) " "Info: Total interconnect delay = 0.894 ns ( 60.20 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.485 ns" { lcd_e~reg0 lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.485 ns" { lcd_e~reg0 lcd_e~reg0 } { 0.000ns 0.894ns } { 0.000ns 0.591ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "0.221 ns + " "Info: + Micro hold delay of destination is 0.221 ns" {  } { { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 119 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "15.601 ns" { clk clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "15.601 ns" { clk clk~combout clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.875ns 1.841ns 1.139ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.914ns 0.740ns 0.200ns 1.294ns 0.918ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "11.357 ns" { clk clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "11.357 ns" { clk clk~combout clkcnt[16] Equal0~186 clkdiv lcd_e~reg0 } { 0.000ns 0.000ns 1.267ns 0.954ns 0.740ns 3.216ns } { 0.000ns 1.163ns 1.294ns 0.511ns 1.294ns 0.918ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.485 ns" { lcd_e~reg0 lcd_e~reg0 } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "1.485 ns" { lcd_e~reg0 lcd_e~reg0 } { 0.000ns 0.894ns } { 0.000ns 0.591ns } } }  } 0 0 "Found hold time violation between source  pin or register \"%1!s!\" and destination pin or register \"%2!s!\" for clock \"%3!s!\" (Hold time is %4!s!)" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk data\[0\] state\[3\] 37.327 ns register " "Info: tco from clock \"clk\" to destination pin \"data\[0\]\" through register \"state\[3\]\" is 37.327 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 19.643 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 19.643 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns clk 1 CLK PIN_12 19 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_12; Fanout = 19; CLK Node = 'clk'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.267 ns) + CELL(1.294 ns) 3.724 ns clkcnt\[7\] 2 REG LC_X2_Y2_N6 4 " "Info: 2: + IC(1.267 ns) + CELL(1.294 ns) = 3.724 ns; Loc. = LC_X2_Y2_N6; Fanout = 4; REG Node = 'clkcnt\[7\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.561 ns" { clk clkcnt[7] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 81 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.875 ns) + CELL(0.914 ns) 5.513 ns Equal0~182 3 COMB LC_X2_Y2_N7 1 " "Info: 3: + IC(0.875 ns) + CELL(0.914 ns) = 5.513 ns; Loc. = LC_X2_Y2_N7; Fanout = 1; COMB Node = 'Equal0~182'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.789 ns" { clkcnt[7] Equal0~182 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.841 ns) + CELL(0.740 ns) 8.094 ns Equal0~185 4 COMB LC_X2_Y3_N7 1 " "Info: 4: + IC(1.841 ns) + CELL(0.740 ns) = 8.094 ns; Loc. = LC_X2_Y3_N7; Fanout = 1; COMB Node = 'Equal0~185'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.581 ns" { Equal0~182 Equal0~185 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.139 ns) + CELL(0.200 ns) 9.433 ns Equal0~186 5 COMB LC_X3_Y3_N4 10 " "Info: 5: + IC(1.139 ns) + CELL(0.200 ns) = 9.433 ns; Loc. = LC_X3_Y3_N4; Fanout = 10; COMB Node = 'Equal0~186'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.339 ns" { Equal0~185 Equal0~186 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.740 ns) + CELL(1.294 ns) 11.467 ns clkdiv 6 REG LC_X3_Y3_N9 3 " "Info: 6: + IC(0.740 ns) + CELL(1.294 ns) = 11.467 ns; Loc. = LC_X3_Y3_N9; Fanout = 3; REG Node = 'clkdiv'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.034 ns" { Equal0~186 clkdiv } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 75 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.216 ns) + CELL(1.294 ns) 15.977 ns clk_int 7 REG LC_X2_Y3_N2 21 " "Info: 7: + IC(3.216 ns) + CELL(1.294 ns) = 15.977 ns; Loc. = LC_X2_Y3_N2; Fanout = 21; REG Node = 'clk_int'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.510 ns" { clkdiv clk_int } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 110 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.748 ns) + CELL(0.918 ns) 19.643 ns state\[3\] 8 REG LC_X5_Y1_N3 7 " "Info: 8: + IC(2.748 ns) + CELL(0.918 ns) = 19.643 ns; Loc. = LC_X5_Y1_N3; Fanout = 7; REG Node = 'state\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.666 ns" { clk_int state[3] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 153 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.817 ns ( 39.80 % ) " "Info: Total cell delay = 7.817 ns ( 39.80 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.826 ns ( 60.20 % ) " "Info: Total interconnect delay = 11.826 ns ( 60.20 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "19.643 ns" { clk clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv clk_int state[3] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "19.643 ns" { clk clk~combout clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv clk_int state[3] } { 0.000ns 0.000ns 1.267ns 0.875ns 1.841ns 1.139ns 0.740ns 3.216ns 2.748ns } { 0.000ns 1.163ns 1.294ns 0.914ns 0.740ns 0.200ns 1.294ns 1.294ns 0.918ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns + " "Info: + Micro clock to output delay of source is 0.376 ns" {  } { { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 153 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "17.308 ns + Longest register pin " "Info: + Longest register to pin delay is 17.308 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns state\[3\] 1 REG LC_X5_Y1_N3 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X5_Y1_N3; Fanout = 7; REG Node = 'state\[3\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { state[3] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 153 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.896 ns) + CELL(0.200 ns) 1.096 ns Equal5~77 2 COMB LC_X5_Y1_N9 2 " "Info: 2: + IC(0.896 ns) + CELL(0.200 ns) = 1.096 ns; Loc. = LC_X5_Y1_N9; Fanout = 2; COMB Node = 'Equal5~77'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.096 ns" { state[3] Equal5~77 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.746 ns) + CELL(0.740 ns) 2.582 ns Equal1~55 3 COMB LC_X5_Y1_N7 18 " "Info: 3: + IC(0.746 ns) + CELL(0.740 ns) = 2.582 ns; Loc. = LC_X5_Y1_N7; Fanout = 18; COMB Node = 'Equal1~55'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.486 ns" { Equal5~77 Equal1~55 } "NODE_NAME" } } { "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.082 ns) + CELL(0.740 ns) 5.404 ns char_addr~1236 4 COMB LC_X5_Y3_N5 9 " "Info: 4: + IC(2.082 ns) + CELL(0.740 ns) = 5.404 ns; Loc. = LC_X5_Y3_N5; Fanout = 9; COMB Node = 'char_addr~1236'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.822 ns" { Equal1~55 char_addr~1236 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.794 ns) + CELL(0.511 ns) 6.709 ns char_addr\[0\]~1238 5 COMB LC_X5_Y3_N2 4 " "Info: 5: + IC(0.794 ns) + CELL(0.511 ns) = 6.709 ns; Loc. = LC_X5_Y3_N2; Fanout = 4; COMB Node = 'char_addr\[0\]~1238'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.305 ns" { char_addr~1236 char_addr[0]~1238 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.713 ns) + CELL(0.200 ns) 8.622 ns char_addr\[0\]~1239 6 COMB LC_X6_Y4_N9 1 " "Info: 6: + IC(1.713 ns) + CELL(0.200 ns) = 8.622 ns; Loc. = LC_X6_Y4_N9; Fanout = 1; COMB Node = 'char_addr\[0\]~1239'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.913 ns" { char_addr[0]~1238 char_addr[0]~1239 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.720 ns) + CELL(0.200 ns) 9.542 ns char_addr\[0\]~1240 7 COMB LC_X6_Y4_N7 9 " "Info: 7: + IC(0.720 ns) + CELL(0.200 ns) = 9.542 ns; Loc. = LC_X6_Y4_N7; Fanout = 9; COMB Node = 'char_addr\[0\]~1240'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.920 ns" { char_addr[0]~1239 char_addr[0]~1240 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.910 ns) + CELL(0.740 ns) 12.192 ns char_ram:aa\|Mux6~147 8 COMB LC_X7_Y3_N9 1 " "Info: 8: + IC(1.910 ns) + CELL(0.740 ns) = 12.192 ns; Loc. = LC_X7_Y3_N9; Fanout = 1; COMB Node = 'char_ram:aa\|Mux6~147'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.650 ns" { char_addr[0]~1240 char_ram:aa|Mux6~147 } "NODE_NAME" } } { "char_ram.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/char_ram.vhd" 120 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.711 ns) + CELL(0.200 ns) 13.103 ns char_ram:aa\|Mux6~148 9 COMB LC_X7_Y3_N4 1 " "Info: 9: + IC(0.711 ns) + CELL(0.200 ns) = 13.103 ns; Loc. = LC_X7_Y3_N4; Fanout = 1; COMB Node = 'char_ram:aa\|Mux6~148'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.911 ns" { char_ram:aa|Mux6~147 char_ram:aa|Mux6~148 } "NODE_NAME" } } { "char_ram.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/char_ram.vhd" 120 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.766 ns) + CELL(0.511 ns) 14.380 ns comb~1301 10 COMB LC_X7_Y3_N3 1 " "Info: 10: + IC(0.766 ns) + CELL(0.511 ns) = 14.380 ns; Loc. = LC_X7_Y3_N3; Fanout = 1; COMB Node = 'comb~1301'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.277 ns" { char_ram:aa|Mux6~148 comb~1301 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.606 ns) + CELL(2.322 ns) 17.308 ns data\[0\] 11 PIN PIN_68 0 " "Info: 11: + IC(0.606 ns) + CELL(2.322 ns) = 17.308 ns; Loc. = PIN_68; Fanout = 0; PIN Node = 'data\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.928 ns" { comb~1301 data[0] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.364 ns ( 36.77 % ) " "Info: Total cell delay = 6.364 ns ( 36.77 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.944 ns ( 63.23 % ) " "Info: Total interconnect delay = 10.944 ns ( 63.23 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "17.308 ns" { state[3] Equal5~77 Equal1~55 char_addr~1236 char_addr[0]~1238 char_addr[0]~1239 char_addr[0]~1240 char_ram:aa|Mux6~147 char_ram:aa|Mux6~148 comb~1301 data[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "17.308 ns" { state[3] Equal5~77 Equal1~55 char_addr~1236 char_addr[0]~1238 char_addr[0]~1239 char_addr[0]~1240 char_ram:aa|Mux6~147 char_ram:aa|Mux6~148 comb~1301 data[0] } { 0.000ns 0.896ns 0.746ns 2.082ns 0.794ns 1.713ns 0.720ns 1.910ns 0.711ns 0.766ns 0.606ns } { 0.000ns 0.200ns 0.740ns 0.740ns 0.511ns 0.200ns 0.200ns 0.740ns 0.200ns 0.511ns 2.322ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "19.643 ns" { clk clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv clk_int state[3] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "19.643 ns" { clk clk~combout clkcnt[7] Equal0~182 Equal0~185 Equal0~186 clkdiv clk_int state[3] } { 0.000ns 0.000ns 1.267ns 0.875ns 1.841ns 1.139ns 0.740ns 3.216ns 2.748ns } { 0.000ns 1.163ns 1.294ns 0.914ns 0.740ns 0.200ns 1.294ns 1.294ns 0.918ns } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "17.308 ns" { state[3] Equal5~77 Equal1~55 char_addr~1236 char_addr[0]~1238 char_addr[0]~1239 char_addr[0]~1240 char_ram:aa|Mux6~147 char_ram:aa|Mux6~148 comb~1301 data[0] } "NODE_NAME" } } { "c:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus60/win/Technology_Viewer.qrui" "17.308 ns" { state[3] Equal5~77 Equal1~55 char_addr~1236 char_addr[0]~1238 char_addr[0]~1239 char_addr[0]~1240 char_ram:aa|Mux6~147 char_ram:aa|Mux6~148 comb~1301 data[0] } { 0.000ns 0.896ns 0.746ns 2.082ns 0.794ns 1.713ns 0.720ns 1.910ns 0.711ns 0.766ns 0.606ns } { 0.000ns 0.200ns 0.740ns 0.740ns 0.511ns 0.200ns 0.200ns 0.740ns 0.200ns 0.511ns 2.322ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Dec 07 14:10:31 2008 " "Info: Processing ended: Sun Dec 07 14:10:31 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}