lcd.fit.qmsg

CPLD的小程序集合

{ "Extra Info" "IFSAC_FSAC_START_LUT_PACKING" "" "Extra Info: Moving registers into LUTs to improve timing and density" {  } {  } 1 0 "Moving registers into LUTs to improve timing and density" 1 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Info: Started processing fast register assignments" {  } {  } 0 0 "Started processing fast register assignments" 0 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Info: Finished processing fast register assignments" {  } {  } 0 0 "Finished processing fast register assignments" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "00:00:01 " "Extra Info: Finished moving registers into LUTs: elapsed time is 00:00:01" {  } {  } 1 0 "Finished moving registers into LUTs: elapsed time is %1!s!" 1 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:01 " "Info: Finished register packing: elapsed time is 00:00:01" {  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "1 unused 3.30 0 1 0 " "Info: Number of I/O pins in group: 1 (unused VREF, 3.30 VCCIO, 0 input, 1 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 2 36 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 2 total pin(s) used --  36 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use 3.30V 11 31 " "Info: I/O bank number 2 does not use VREF pins and has 3.30V VCCIO pins. 11 total pin(s) used --  31 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}  } {  } 0 0 "I/O bank details %1!s! I/O pin placement" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:02 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:02 " "Info: Fitter placement operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "19.328 ns register pin " "Info: Estimated most critical path is register to pin delay of 19.328 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns counter\[0\] 1 REG LAB_X6_Y2 13 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X6_Y2; Fanout = 13; REG Node = 'counter\[0\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { counter[0] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 153 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.070 ns) + CELL(0.978 ns) 3.048 ns Add1~120 2 COMB LAB_X6_Y4 2 " "Info: 2: + IC(2.070 ns) + CELL(0.978 ns) = 3.048 ns; Loc. = LAB_X6_Y4; Fanout = 2; COMB Node = 'Add1~120'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.048 ns" { counter[0] Add1~120 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.123 ns) 3.171 ns Add1~122 3 COMB LAB_X6_Y4 2 " "Info: 3: + IC(0.000 ns) + CELL(0.123 ns) = 3.171 ns; Loc. = LAB_X6_Y4; Fanout = 2; COMB Node = 'Add1~122'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.123 ns" { Add1~120 Add1~122 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.123 ns) 3.294 ns Add1~124 4 COMB LAB_X6_Y4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.123 ns) = 3.294 ns; Loc. = LAB_X6_Y4; Fanout = 2; COMB Node = 'Add1~124'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.123 ns" { Add1~122 Add1~124 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.399 ns) 3.693 ns Add1~116 5 COMB LAB_X6_Y4 2 " "Info: 5: + IC(0.000 ns) + CELL(0.399 ns) = 3.693 ns; Loc. = LAB_X6_Y4; Fanout = 2; COMB Node = 'Add1~116'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.399 ns" { Add1~124 Add1~116 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.234 ns) 4.927 ns Add1~117 6 COMB LAB_X6_Y4 1 " "Info: 6: + IC(0.000 ns) + CELL(1.234 ns) = 4.927 ns; Loc. = LAB_X6_Y4; Fanout = 1; COMB Node = 'Add1~117'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.234 ns" { Add1~116 Add1~117 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.534 ns) + CELL(0.740 ns) 7.201 ns Add2~515 7 COMB LAB_X6_Y3 2 " "Info: 7: + IC(1.534 ns) + CELL(0.740 ns) = 7.201 ns; Loc. = LAB_X6_Y3; Fanout = 2; COMB Node = 'Add2~515'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.274 ns" { Add1~117 Add2~515 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.980 ns) + CELL(0.200 ns) 8.381 ns Add2~516 8 COMB LAB_X6_Y3 1 " "Info: 8: + IC(0.980 ns) + CELL(0.200 ns) = 8.381 ns; Loc. = LAB_X6_Y3; Fanout = 1; COMB Node = 'Add2~516'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Add2~515 Add2~516 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 146 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.669 ns) + CELL(0.511 ns) 9.561 ns char_addr\[4\]~1237 9 COMB LAB_X6_Y3 11 " "Info: 9: + IC(0.669 ns) + CELL(0.511 ns) = 9.561 ns; Loc. = LAB_X6_Y3; Fanout = 11; COMB Node = 'char_addr\[4\]~1237'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Add2~516 char_addr[4]~1237 } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.534 ns) + CELL(0.740 ns) 11.835 ns comb~1320 10 COMB LAB_X5_Y4 1 " "Info: 10: + IC(1.534 ns) + CELL(0.740 ns) = 11.835 ns; Loc. = LAB_X5_Y4; Fanout = 1; COMB Node = 'comb~1320'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.274 ns" { char_addr[4]~1237 comb~1320 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.440 ns) + CELL(0.740 ns) 13.015 ns comb~1321 11 COMB LAB_X5_Y4 1 " "Info: 11: + IC(0.440 ns) + CELL(0.740 ns) = 13.015 ns; Loc. = LAB_X5_Y4; Fanout = 1; COMB Node = 'comb~1321'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { comb~1320 comb~1321 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.980 ns) + CELL(0.200 ns) 14.195 ns comb~1318 12 COMB LAB_X5_Y4 1 " "Info: 12: + IC(0.980 ns) + CELL(0.200 ns) = 14.195 ns; Loc. = LAB_X5_Y4; Fanout = 1; COMB Node = 'comb~1318'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { comb~1321 comb~1318 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.440 ns) + CELL(0.740 ns) 15.375 ns comb~1319 13 COMB LAB_X5_Y4 1 " "Info: 13: + IC(0.440 ns) + CELL(0.740 ns) = 15.375 ns; Loc. = LAB_X5_Y4; Fanout = 1; COMB Node = 'comb~1319'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { comb~1318 comb~1319 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.631 ns) + CELL(2.322 ns) 19.328 ns data\[2\] 14 PIN PIN_70 0 " "Info: 14: + IC(1.631 ns) + CELL(2.322 ns) = 19.328 ns; Loc. = PIN_70; Fanout = 0; PIN Node = 'data\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.953 ns" { comb~1319 data[2] } "NODE_NAME" } } { "lcd.vhd" "" { Text "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.050 ns ( 46.82 % ) " "Info: Total cell delay = 9.050 ns ( 46.82 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.278 ns ( 53.18 % ) " "Info: Total interconnect delay = 10.278 ns ( 53.18 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "19.328 ns" { counter[0] Add1~120 Add1~122 Add1~124 Add1~116 Add1~117 Add2~515 Add2~516 char_addr[4]~1237 comb~1320 comb~1321 comb~1318 comb~1319 data[2] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "11 11 " "Info: Average interconnect usage is 11% of the available device resources. Peak interconnect usage is 11%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x0_y0 x8_y5 " "Info: The peak interconnect region extends from location x0_y0 to location x8_y5" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:02 " "Info: Fitter routing operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Dec 07 14:10:21 2008 " "Info: Processing ended: Sun Dec 07 14:10:21 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:14 " "Info: Elapsed time: 00:00:14" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.fit.smsg " "Info: Generated suppressed messages file F:/G盘文件/EPM240/EPM240程序/lcd液晶显示/lcd/lcd.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}